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Searched refs:mainpllc_reg (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c403 uint32_t get_clk_freq(uint32_t psrc_reg, uint32_t mainpllc_reg, in get_clk_freq() argument
417 clock /= (mmio_read_32(mainpllc_reg) & CLKMGR_PLLCX_DIV_MSK); in get_clk_freq()