Searched refs:dram_timing_cfg (Results 1 – 1 of 1) sorted by relevance
138 struct dram_cfg *dram_timing_cfg; variable167 mmio_write_32(IMX_DDRC_BASE + i * 4, dram_timing_cfg->ctl_cfg[i]); in ddr_init()172 mmio_write_32(IMX_DDRC_BASE + 0x2000 + i * 4, dram_timing_cfg->pi_cfg[i]); in ddr_init()199 mmio_write_32(IMX_DDRC_BASE + 0x4000 + i * 4, dram_timing_cfg->phy_full[i]); in ddr_init()207 dram_timing_cfg->phy_diff[i]); in ddr_init()219 dram_timing_cfg = (struct dram_cfg *)(SAVED_DRAM_DATA_BASE + in dram_lp_auto_disable()227 dram_timing_cfg->auto_lp_cfg[0] = mmio_read_32(IMX_DDRC_BASE + DENALI_CTL_144); in dram_lp_auto_disable()228 dram_timing_cfg->auto_lp_cfg[1] = mmio_read_32(IMX_DDRC_BASE + DENALI_CTL_147); in dram_lp_auto_disable()229 dram_timing_cfg->auto_lp_cfg[2] = mmio_read_32(IMX_DDRC_BASE + DENALI_CTL_146); in dram_lp_auto_disable()266 mmio_write_32(IMX_DDRC_BASE + DENALI_CTL_144, dram_timing_cfg->auto_lp_cfg[0]); in dram_lp_auto_enable()[all …]