Searched refs:cacheable (Results 1 – 4 of 4) sorted by relevance
1890 uint32_t cacheable : 2; member
2212 region accesses are Outer Shareable, non-cacheable and they can be accessed with2401 the memory where the data structures are allocated is cacheable, the overhead is
1506 - ''A57_ENABLE_NON_CACHEABLE_LOAD_FWD'': This flag enables non-cacheable
10630 - cortex-a57: Enable higher performance non-cacheable load forwarding10736 some areas in BL2, dynamically map DDR later and non-cacheable during its10825 - arm/sgi: Bump bl1 RW limit, mark remote chip shared ram as non-cacheable,11009 - Neoverse N1: Force cacheable atomic to near atomic12326 - Added support to mark the translation tables as non-cacheable using an12535 - Added support for mapping Normal, Inner Non-cacheable, Outer Non-cacheable12538 This can be useful to map a non-cacheable memory region, such as a DMA