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Searched refs:afflv (Results 1 – 8 of 8) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_cpu_pm.c113 .afflv = 0, in cpupm_smp_init()
206 if (!state || (state->pwr.afflv > PLAT_MAX_PWR_LVL)) { in cpupm_do_pstate_off()
225 !IS_PLAT_SYSTEM_SUSPEND(state->pwr.afflv)) { in cpupm_do_pstate_off()
235 if ((mt_pwr_nodes[MT_PWR_NONMCUSYS] == 0) && IS_PLAT_MCUSYSOFF_AFFLV(state->pwr.afflv)) { in cpupm_do_pstate_off()
245 if (state->pwr.afflv >= PLAT_MT_CPU_SUSPEND_CLUSTER) { in cpupm_do_pstate_off()
263 if (state->pwr.afflv > PLAT_MAX_PWR_LVL) { in cpupm_do_pstate_on()
275 if (state->pwr.afflv >= PLAT_MT_CPU_SUSPEND_CLUSTER) { in cpupm_do_pstate_on()
298 !IS_PLAT_SYSTEM_SUSPEND(state->pwr.afflv)) { in cpupm_do_pstate_on()
308 if (IS_PLAT_SYSTEM_SUSPEND(state->pwr.afflv) || in cpupm_do_pstate_on()
309 (IS_PLAT_SYSTEM_RETENTION(state->pwr.afflv) && (mt_pwr_nodes[MT_PWR_SUSPEND] > 0))) { in cpupm_do_pstate_on()
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/topology/group_4_3_1/
H A Dpwr.c71 if (state->pwr.afflv >= PLAT_MT_CPU_SUSPEND_CLUSTER) { in pwr_domain_coordination()
102 if (IS_PLAT_MCUSYSOFF_AFFLV(state->pwr.afflv)) { in pwr_domain_coordination()
106 ret = fn(state->pwr.afflv, state, &tp); in pwr_domain_coordination()
/rk3399_ARM-atf/plat/mediatek/lib/pm/
H A Dmtk_pm.h91 unsigned int afflv; member
128 int (*pwr_state_valid)(unsigned int afflv, unsigned int state);
222 #define IS_PLAT_MCUSYSOFF_AFFLV(afflv) (afflv >= PLAT_MT_CPU_SUSPEND_MCUSYS) argument
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/topology/default/
H A Dpwr.c78 if (state->pwr.afflv >= PLAT_MT_CPU_SUSPEND_CLUSTER) in pwr_domain_coordination()
85 if (IS_PLAT_MCUSYSOFF_AFFLV(state->pwr.afflv) && in pwr_domain_coordination()
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv8_2/
H A Dpwr_ctrl.c161 if (IS_PLAT_SYSTEM_RETENTION(state->pwr.afflv)) { in armv8_2_cpu_pwr_on_common()
240 .afflv = armv8_2_get_pwr_afflv(state), in armv8_2_power_domain_on_finish()
265 .afflv = armv8_2_get_pwr_afflv(state), in armv8_2_power_domain_off()
291 pm_state.pwr.afflv = armv8_2_get_pwr_afflv(state); in armv8_2_power_domain_suspend()
329 pm_state.pwr.afflv = armv8_2_get_pwr_afflv(state); in armv8_2_power_domain_suspend_finish()
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv9_0/
H A Dpwr_ctrl.c223 .afflv = get_pwr_afflv(state), in power_domain_on_finish()
249 .afflv = get_pwr_afflv(state), in power_domain_off()
277 pm_state.pwr.afflv = get_pwr_afflv(state); in power_domain_suspend()
311 pm_state.pwr.afflv = get_pwr_afflv(state); in power_domain_suspend_finish()
/rk3399_ARM-atf/plat/mediatek/include/lib/pm/
H A Dmtk_pm.h99 unsigned int afflv; member
209 int (*pwr_state_valid)(unsigned int afflv, unsigned int state);
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_cpu_pm.c306 .afflv = 0, in cpupm_smp_init()
544 if (!state || (state->pwr.afflv > PLAT_MAX_PWR_LVL)) { in cpupm_do_pstate_off()
546 CPU_PM_ASSERT(state->pwr.afflv <= PLAT_MAX_PWR_LVL); in cpupm_do_pstate_off()
585 if (state->pwr.afflv > PLAT_MAX_PWR_LVL) in cpupm_do_pstate_on()
724 static int cpupm_pwr_state_valid(unsigned int afflv, unsigned int state) in cpupm_pwr_state_valid() argument