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Searched refs:_BITS_ (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_plat_spm_setting.c56 #define _BITS_(_bits_, _val_) \ macro
92 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(55000)),
97 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(60000)),
102 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(65000)),
107 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(72500)),
112 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(80000)),
192 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(55000)),
197 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(60000)),
202 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(65000)),
207 _BITS_(7 : 0, VOLT_TO_PMIC_VAL(72500)),
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_pmic_wrap.c23 #define _BITS_(h, l, v) ((GENMASK(h, l) & ((v) << (l)))) macro
61 ._[CMD_0] = {BUCK_VGPU11_ELR0, _BITS_(6, 0, VOLT_TO_PMIC_VAL(75000)),},
62 ._[CMD_1] = {BUCK_VGPU11_ELR0, _BITS_(6, 0, VOLT_TO_PMIC_VAL(65000)),},
63 ._[CMD_2] = {BUCK_VGPU11_ELR0, _BITS_(6, 0, VOLT_TO_PMIC_VAL(60000)),},
64 ._[CMD_3] = {BUCK_VGPU11_ELR0, _BITS_(6, 0, VOLT_TO_PMIC_VAL(55000)),},
65 ._[CMD_4] = {TOP_SPI_CON0, _BITS_(0, 0, 1),},
66 ._[CMD_5] = {TOP_SPI_CON0, _BITS_(0, 0, 0),},