1 /* 2 * Copyright (c) 2026, Qualcomm Technologies, Inc. and/or its subsidiaries. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef VMIDMT_HAL_HWIO_H 8 #define VMIDMT_HAL_HWIO_H 9 10 #include <lib/mmio.h> 11 12 #define in_dword(addr) mmio_read_32((addr)) 13 #define in_dword_masked(addr, mask) (mmio_read_32((addr)) & (uint32_t)(mask)) 14 #define out_dword_masked_ns(io, mask, val, current_reg_content) \ 15 mmio_write_32((io), \ 16 (((uint32_t)(current_reg_content) & ~(uint32_t)(mask)) | \ 17 ((uint32_t)(val) & (uint32_t)(mask)))) 18 19 #define VMIDMT_SCR0_ADDR(b) (b) 20 #define VMIDMT_SCR0_PHYS(b) (b) 21 #define VMIDMT_SCR0_RMSK 0xffffffff 22 #define VMIDMT_SCR0_SHFT 0 23 #define VMIDMT_SCR0_IN(b) in_dword_masked(VMIDMT_SCR0_ADDR(b), VMIDMT_SCR0_RMSK) 24 #define VMIDMT_SCR0_INM(b, m) in_dword_masked(VMIDMT_SCR0_ADDR(b), (m)) 25 #define VMIDMT_SCR0_OUT(b, v) mmio_write_32(VMIDMT_SCR0_ADDR(b), (v)) 26 #define VMIDMT_SCR0_OUTM(b, m, v) \ 27 out_dword_masked_ns(VMIDMT_SCR0_ADDR(b), (m), (v), VMIDMT_SCR0_IN(b)) 28 29 #define VMIDMT_SCR0_NSCFG_BMSK 0x30000000 30 #define VMIDMT_SCR0_NSCFG_SHFT 0x1c 31 #define VMIDMT_SCR0_WACFG_BMSK 0x0c000000 32 #define VMIDMT_SCR0_WACFG_SHFT 0x1a 33 #define VMIDMT_SCR0_RACFG_BMSK 0x03000000 34 #define VMIDMT_SCR0_RACFG_SHFT 0x18 35 #define VMIDMT_SCR0_SHCFG_BMSK 0x00C00000 36 #define VMIDMT_SCR0_SHCFG_SHFT 0x16 37 #define VMIDMT_SCR0_SMCFCFG_BMSK 0x00200000 38 #define VMIDMT_SCR0_SMCFCFG_SHFT 0x15 39 #define VMIDMT_SCR0_MTCFG_BMSK 0x00100000 40 #define VMIDMT_SCR0_MTCFG_SHFT 0x14 41 #define VMIDMT_SCR0_MEMATTR_BMSK 0x000F0000 42 #define VMIDMT_SCR0_MEMATTR_SHFT 0x10 43 #define VMIDMT_SCR0_VMIDPNE_BMSK 0x00000800 44 #define VMIDMT_SCR0_VMIDPNE_SHFT 0x0b 45 #define VMIDMT_SCR0_USFCFG_BMSK 0x00000400 46 #define VMIDMT_SCR0_USFCFG_SHFT 0x0a 47 #define VMIDMT_SCR0_TRANSIENTCFG_BMSK 0x000000C0 48 #define VMIDMT_SCR0_TRANSIENTCFG_SHFT 0x06 49 #define VMIDMT_SCR0_GCFGFIE_BMSK 0x00000020 50 #define VMIDMT_SCR0_GCFGFIE_SHFT 0x05 51 #define VMIDMT_SCR0_GCFGFRE_BMSK 0x00000010 52 #define VMIDMT_SCR0_GCFGFRE_SHFT 0x04 53 #define VMIDMT_SCR0_GFIE_BMSK 0x00000004 54 #define VMIDMT_SCR0_GFIE_SHFT 0x02 55 #define VMIDMT_SCR0_CLIENTPD_BMSK 0x00000001 56 #define VMIDMT_SCR0_CLIENTPD_SHFT 0x00 57 58 #define VMIDMT_CR0_ADDR(b) (b) 59 #define VMIDMT_CR0_PHYS(b) (b) 60 #define VMIDMT_CR0_RMSK 0x0fffffff 61 #define VMIDMT_CR0_SHFT 0 62 #define VMIDMT_CR0_IN(b) in_dword_masked(VMIDMT_CR0_ADDR(b), VMIDMT_CR0_RMSK) 63 #define VMIDMT_CR0_INM(b, m) in_dword_masked(VMIDMT_CR0_ADDR(b), (m)) 64 #define VMIDMT_CR0_OUT(b, v) mmio_write_32(VMIDMT_CR0_ADDR(b), (v)) 65 #define VMIDMT_CR0_OUTM(b, m, v) \ 66 out_dword_masked_ns(VMIDMT_CR0_ADDR(b), (m), (v), VMIDMT_CR0_IN(b)) 67 68 #define VMIDMT_CR0_WACFG_BMSK 0x0c000000 69 #define VMIDMT_CR0_WACFG_SHFT 0x1a 70 #define VMIDMT_CR0_RACFG_BMSK 0x03000000 71 #define VMIDMT_CR0_RACFG_SHFT 0x18 72 #define VMIDMT_CR0_SHCFG_BMSK 0x00C00000 73 #define VMIDMT_CR0_SHCFG_SHFT 0x16 74 #define VMIDMT_CR0_SMCFCFG_BMSK 0x00200000 75 #define VMIDMT_CR0_SMCFCFG_SHFT 0x15 76 #define VMIDMT_CR0_MTCFG_BMSK 0x00100000 77 #define VMIDMT_CR0_MTCFG_SHFT 0x14 78 #define VMIDMT_CR0_MEMATTR_BMSK 0x000F0000 79 #define VMIDMT_CR0_MEMATTR_SHFT 0x10 80 #define VMIDMT_CR0_VMIDPNE_BMSK 0x00000800 81 #define VMIDMT_CR0_VMIDPNE_SHFT 0x0b 82 #define VMIDMT_CR0_USFCFG_BMSK 0x00000400 83 #define VMIDMT_CR0_USFCFG_SHFT 0x0a 84 #define VMIDMT_CR0_TRANSIENTCFG_BMSK 0x000000C0 85 #define VMIDMT_CR0_TRANSIENTCFG_SHFT 0x06 86 #define VMIDMT_CR0_GCFGFIE_BMSK 0x00000020 87 #define VMIDMT_CR0_GCFGFIE_SHFT 0x05 88 #define VMIDMT_CR0_GCFGFRE_BMSK 0x00000010 89 #define VMIDMT_CR0_GCFGFRE_SHFT 0x04 90 #define VMIDMT_CR0_GFIE_BMSK 0x00000004 91 #define VMIDMT_CR0_GFIE_SHFT 0x02 92 #define VMIDMT_CR0_CLIENTPD_BMSK 0x00000001 93 #define VMIDMT_CR0_CLIENTPD_SHFT 0x00 94 95 #define VMIDMT_NSCR0_ADDR(b) (b + 0x00000400) 96 #define VMIDMT_NSCR0_PHYS(b) (b + 0x00000400) 97 #define VMIDMT_NSCR0_RMSK 0x0fffffff 98 #define VMIDMT_NSCR0_SHFT 0 99 #define VMIDMT_NSCR0_IN(b) \ 100 in_dword_masked(VMIDMT_NSCR0_ADDR(b), VMIDMT_NSCR0_RMSK) 101 #define VMIDMT_NSCR0_INM(b, m) in_dword_masked(VMIDMT_NSCR0_ADDR(b), (m)) 102 #define VMIDMT_NSCR0_OUT(b, v) mmio_write_32(VMIDMT_NSCR0_ADDR(b), (v)) 103 #define VMIDMT_NSCR0_OUTM(b, m, v) \ 104 out_dword_masked_ns(VMIDMT_NSCR0_ADDR(b), (m), (v), VMIDMT_NSCR0_IN(b)) 105 106 #define VMIDMT_NSCR0_WACFG_BMSK 0x0c000000 107 #define VMIDMT_NSCR0_WACFG_SHFT 0x1a 108 #define VMIDMT_NSCR0_RACFG_BMSK 0x03000000 109 #define VMIDMT_NSCR0_RACFG_SHFT 0x18 110 #define VMIDMT_NSCR0_SHCFG_BMSK 0x00C00000 111 #define VMIDMT_NSCR0_SHCFG_SHFT 0x16 112 #define VMIDMT_NSCR0_SMCFCFG_BMSK 0x00200000 113 #define VMIDMT_NSCR0_SMCFCFG_SHFT 0x15 114 #define VMIDMT_NSCR0_MTCFG_BMSK 0x00100000 115 #define VMIDMT_NSCR0_MTCFG_SHFT 0x14 116 #define VMIDMT_NSCR0_MEMATTR_BMSK 0x000F0000 117 #define VMIDMT_NSCR0_MEMATTR_SHFT 0x10 118 #define VMIDMT_NSCR0_VMIDPNE_BMSK 0x00000800 119 #define VMIDMT_NSCR0_VMIDPNE_SHFT 0x0b 120 #define VMIDMT_NSCR0_USFCFG_BMSK 0x00000400 121 #define VMIDMT_NSCR0_USFCFG_SHFT 0x0a 122 #define VMIDMT_NSCR0_TRANSIENTCFG_BMSK 0x000000C0 123 #define VMIDMT_NSCR0_TRANSIENTCFG_SHFT 0x06 124 #define VMIDMT_NSCR0_GCFGFIE_BMSK 0x00000020 125 #define VMIDMT_NSCR0_GCFGFIE_SHFT 0x05 126 #define VMIDMT_NSCR0_GCFGFRE_BMSK 0x00000010 127 #define VMIDMT_NSCR0_GCFGFRE_SHFT 0x04 128 #define VMIDMT_NSCR0_GFIE_BMSK 0x00000004 129 #define VMIDMT_NSCR0_GFIE_SHFT 0x02 130 #define VMIDMT_NSCR0_CLIENTPD_BMSK 0x00000001 131 #define VMIDMT_NSCR0_CLIENTPD_SHFT 0x00 132 133 #define VMIDMT_SCR1_ADDR(b) (b + 0x00000004) 134 #define VMIDMT_SCR1_PHYS(b) (b + 0x00000004) 135 #define VMIDMT_SCR1_RMSK 0x0100FF00 136 #define VMIDMT_SCR1_SHFT 0 137 #define VMIDMT_SCR1_IN(b) in_dword_masked(VMIDMT_SCR1_ADDR(b), VMIDMT_SCR1_RMSK) 138 #define VMIDMT_SCR1_INM(b, m) in_dword_masked(VMIDMT_SCR1_ADDR(b), (m)) 139 #define VMIDMT_SCR1_OUT(b, v) mmio_write_32(VMIDMT_SCR1_ADDR(b), (v)) 140 #define VMIDMT_SCR1_OUTM(b, m, v) \ 141 out_dword_masked_ns(VMIDMT_SCR1_ADDR(b), (m), (v), VMIDMT_SCR1_IN(b)) 142 143 #define VMIDMT_SCR1_GASRAE_BMSK 0x01000000 144 #define VMIDMT_SCR1_GASRAE_SHFT 0x18 145 #define VMIDMT_SCR1_NSNUMSMRGO_BMSK 0x0000ff00 146 #define VMIDMT_SCR1_NSNUMSMRGO_SHFT 0x08 147 148 #define VMIDMT_SCR2_ADDR(b) (b + 0x00000008) 149 #define VMIDMT_SCR2_PHYS(b) (b + 0x00000008) 150 #define VMIDMT_SCR2_RMSK 0x0000FF00 151 #define VMIDMT_SCR2_SHFT 0 152 #define VMIDMT_SCR2_IN(b) in_dword_masked(VMIDMT_SCR2_ADDR(b), VMIDMT_SCR2_RMSK) 153 #define VMIDMT_SCR2_INM(b, m) in_dword_masked(VMIDMT_SCR2_ADDR(b), (m)) 154 #define VMIDMT_SCR2_OUT(b, v) mmio_write_32(VMIDMT_SCR2_ADDR(b), (v)) 155 #define VMIDMT_SCR2_OUTM(b, m, v) \ 156 out_dword_masked_ns(VMIDMT_SCR2_ADDR(b), (m), (v), VMIDMT_SCR2_IN(b)) 157 158 #define VMIDMT_SCR2_BPVMID_BMSK 0x000000ff 159 #define VMIDMT_SCR2_BPVMID_SHFT 0x00 160 161 #define VMIDMT_CR2_ADDR(b) (b + 0x00000008) 162 #define VMIDMT_CR2_PHYS(b) (b + 0x00000008) 163 #define VMIDMT_CR2_RMSK 0x0000FF00 164 #define VMIDMT_CR2_SHFT 0 165 #define VMIDMT_CR2_IN(b) in_dword_masked(VMIDMT_CR2_ADDR(b), VMIDMT_CR2_RMSK) 166 #define VMIDMT_CR2_INM(b, m) in_dword_masked(VMIDMT_CR2_ADDR(b), (m)) 167 #define VMIDMT_CR2_OUT(b, v) mmio_write_32(VMIDMT_CR2_ADDR(b), (v)) 168 #define VMIDMT_CR2_OUTM(b, m, v) \ 169 out_dword_masked_ns(VMIDMT_CR2_ADDR(b), (m), (v), VMIDMT_CR2_IN(b)) 170 171 #define VMIDMT_CR2_BPVMID_BMSK 0x000000ff 172 #define VMIDMT_CR2_BPVMID_SHFT 0x00 173 174 #define VMIDMT_NSCR2_ADDR(b) (b + 0x00000408) 175 #define VMIDMT_NSCR2_PHYS(b) (b + 0x00000408) 176 #define VMIDMT_NSCR2_RMSK 0x0000FF00 177 #define VMIDMT_NSCR2_SHFT 0 178 #define VMIDMT_NSCR2_IN(b) \ 179 in_dword_masked(VMIDMT_NSCR2_ADDR(b), VMIDMT_NSCR2_RMSK) 180 #define VMIDMT_NSCR2_INM(b, m) in_dword_masked(VMIDMT_NSCR2_ADDR(b), (m)) 181 #define VMIDMT_NSCR2_OUT(b, v) mmio_write_32(VMIDMT_NSCR2_ADDR(b), (v)) 182 #define VMIDMT_NSCR2_OUTM(b, m, v) \ 183 out_dword_masked_ns(VMIDMT_NSCR2_ADDR(b), (m), (v), VMIDMT_NSCR2_IN(b)) 184 185 #define VMIDMT_NSCR2_BPVMID_BMSK 0x000000ff 186 #define VMIDMT_NSCR2_BPVMID_SHFT 0x00 187 188 #define VMIDMT_SACR_ADDR(b) (b + 0x00000010) 189 #define VMIDMT_SACR_PHYS(b) (b + 0x00000010) 190 #define VMIDMT_SACR_RMSK 0x70000013 191 #define VMIDMT_SACR_SHFT 0 192 #define VMIDMT_SACR_IN(b) in_dword_masked(VMIDMT_SACR_ADDR(b), VMIDMT_SACR_RMSK) 193 #define VMIDMT_SACR_INM(b, m) in_dword_masked(VMIDMT_SACR_ADDR(b), (m)) 194 #define VMIDMT_SACR_OUT(b, v) mmio_write_32(VMIDMT_SACR_ADDR(b), (v)) 195 #define VMIDMT_SACR_OUTM(b, m, v) \ 196 out_dword_masked_ns(VMIDMT_SACR_ADDR(b), (m), (v), VMIDMT_SACR_IN(b)) 197 198 #define VMIDMT_SACR_BPRCNSH_BMSK 0x40000000 199 #define VMIDMT_SACR_BPRCNSH_SHFT 0x1e 200 #define VMIDMT_SACR_BPRCISH_BMSK 0x02000000 201 #define VMIDMT_SACR_BPRCISH_SHFT 0x1d 202 #define VMIDMT_SACR_BPRCOSH_BMSK 0x01000000 203 #define VMIDMT_SACR_BPRCOSH_SHFT 0x1c 204 #define VMIDMT_SACR_REQPRIORITYCFG_BMSK 0x00000010 205 #define VMIDMT_SACR_REQPRIORITYCFG_SHFT 0x04 206 #define VMIDMT_SACR_REQPRIORITY_BMSK 0x00000003 207 #define VMIDMT_SACR_REQPRIORITY_SHFT 0x00 208 209 #define VMIDMT_ACR_ADDR(b) (b + 0x00000010) 210 #define VMIDMT_ACR_PHYS(b) (b + 0x00000010) 211 #define VMIDMT_ACR_RMSK 0x70000013 212 #define VMIDMT_ACR_SHFT 0 213 #define VMIDMT_ACR_IN(b) in_dword_masked(VMIDMT_ACR_ADDR(b), VMIDMT_ACR_RMSK) 214 #define VMIDMT_ACR_INM(b, m) in_dword_masked(VMIDMT_ACR_ADDR(b), (m)) 215 #define VMIDMT_ACR_OUT(b, v) mmio_write_32(VMIDMT_ACR_ADDR(b), (v)) 216 #define VMIDMT_ACR_OUTM(b, m, v) \ 217 out_dword_masked_ns(VMIDMT_ACR_ADDR(b), (m), (v), VMIDMT_ACR_IN(b)) 218 219 #define VMIDMT_ACR_BPRCNSH_BMSK 0x40000000 220 #define VMIDMT_ACR_BPRCNSH_SHFT 0x1e 221 #define VMIDMT_ACR_BPRCISH_BMSK 0x02000000 222 #define VMIDMT_ACR_BPRCISH_SHFT 0x1d 223 #define VMIDMT_ACR_BPRCOSH_BMSK 0x01000000 224 #define VMIDMT_ACR_BPRCOSH_SHFT 0x1c 225 #define VMIDMT_ACR_REQPRIORITYCFG_BMSK 0x00000010 226 #define VMIDMT_ACR_REQPRIORITYCFG_SHFT 0x04 227 #define VMIDMT_ACR_REQPRIORITY_BMSK 0x00000003 228 #define VMIDMT_ACR_REQPRIORITY_SHFT 0x00 229 230 #define VMIDMT_NSACR_ADDR(b) (b + 0x00000410) 231 #define VMIDMT_NSACR_PHYS(b) (b + 0x00000410) 232 #define VMIDMT_NSACR_RMSK 0x70000013 233 #define VMIDMT_NSACR_SHFT 0 234 #define VMIDMT_NSACR_IN(b) \ 235 in_dword_masked(VMIDMT_NSACR_ADDR(b), VMIDMT_NSACR_RMSK) 236 #define VMIDMT_NSACR_INM(b, m) in_dword_masked(VMIDMT_NSACR_ADDR(b), (m)) 237 #define VMIDMT_NSACR_OUT(b, v) mmio_write_32(VMIDMT_NSACR_ADDR(b), (v)) 238 #define VMIDMT_NSACR_OUTM(b, m, v) \ 239 out_dword_masked_ns(VMIDMT_NSACR_ADDR(b), (m), (v), VMIDMT_NSACR_IN(b)) 240 241 #define VMIDMT_NSACR_BPRCNSH_BMSK 0x40000000 242 #define VMIDMT_NSACR_BPRCNSH_SHFT 0x1e 243 #define VMIDMT_NSACR_BPRCISH_BMSK 0x02000000 244 #define VMIDMT_NSACR_BPRCISH_SHFT 0x1d 245 #define VMIDMT_NSACR_BPRCOSH_BMSK 0x01000000 246 #define VMIDMT_NSACR_BPRCOSH_SHFT 0x1c 247 #define VMIDMT_NSACR_REQPRIORITYCFG_BMSK 0x00000010 248 #define VMIDMT_NSACR_REQPRIORITYCFG_SHFT 0x04 249 #define VMIDMT_NSACR_REQPRIORITY_BMSK 0x00000003 250 #define VMIDMT_NSACR_REQPRIORITY_SHFT 0x00 251 252 #define VMIDMT_IDR0_ADDR(b) (b + 0x00000020) 253 #define VMIDMT_IDR0_PHYS(b) (b + 0x00000020) 254 #define VMIDMT_IDR0_RMSK 0x88001EFF 255 #define VMIDMT_IDR0_SHFT 0 256 #define VMIDMT_IDR0_IN(b) in_dword_masked(VMIDMT_IDR0_ADDR(b), VMIDMT_IDR0_RMSK) 257 #define VMIDMT_IDR0_INM(b, m) in_dword_masked(VMIDMT_IDR0_ADDR(b), (m)) 258 259 #define VMIDMT_IDR0_SES_BMSK 0x80000000 260 #define VMIDMT_IDR0_SES_SHFT 0x1f 261 #define VMIDMT_IDR0_SMS_BMSK 0x08000000 262 #define VMIDMT_IDR0_SMS_SHFT 0x1b 263 #define VMIDMT_IDR0_NUMSIDB_BMSK 0x00001e00 264 #define VMIDMT_IDR0_NUMSIDB_SHFT 0x09 265 #define VMIDMT_IDR0_NUMSMRG_BMSK 0x000000ff 266 #define VMIDMT_IDR0_NUMSMRG_SHFT 0x00 267 268 #define VMIDMT_IDR1_ADDR(b) (b + 0x00000024) 269 #define VMIDMT_IDR1_PHYS(b) (b + 0x00000024) 270 #define VMIDMT_IDR1_RMSK 0x00009f00 271 #define VMIDMT_IDR1_SHFT 0 272 #define VMIDMT_IDR1_IN(b) in_dword_masked(VMIDMT_IDR1_ADDR(b), VMIDMT_IDR1_RMSK) 273 #define VMIDMT_IDR1_INM(b, m) in_dword_masked(VMIDMT_IDR1_ADDR(b), (m)) 274 275 #define VMIDMT_IDR1_SMCD_BMSK 0x00008000 276 #define VMIDMT_IDR1_SMCD_SHFT 0x0f 277 #define VMIDMT_IDR1_SSDTP_BMSK 0x00001000 278 #define VMIDMT_IDR1_SSDTP_SHFT 0x0c 279 #define VMIDMT_IDR1_NUMSSDNDXB_BMSK 0x00000f00 280 #define VMIDMT_IDR1_NUMSSDNDXB_SHFT 0x08 281 282 #define VMIDMT_IDR2_ADDR(b) (b + 0x00000028) 283 #define VMIDMT_IDR2_PHYS(b) (b + 0x00000028) 284 #define VMIDMT_IDR2_RMSK 0x000000ff 285 #define VMIDMT_IDR2_SHFT 0 286 #define VMIDMT_IDR2_IN(b) in_dword_masked(VMIDMT_IDR2_ADDR(b), VMIDMT_IDR2_RMSK) 287 #define VMIDMT_IDR2_INM(b, m) in_dword_masked(VMIDMT_IDR2_ADDR(b), (m)) 288 289 #define VMIDMT_IDR2_OAS_BMSK 0x000000f0 290 #define VMIDMT_IDR2_OAS_SHFT 0x04 291 #define VMIDMT_IDR2_IAS_BMSK 0x0000000f 292 #define VMIDMT_IDR2_IAS_SHFT 0x00 293 294 #define VMIDMT_IDR4_ADDR(b) (b + 0x00000030) 295 #define VMIDMT_IDR4_PHYS(b) (b + 0x00000030) 296 #define VMIDMT_IDR4_RMSK 0xffffffff 297 #define VMIDMT_IDR4_SHFT 0 298 #define VMIDMT_IDR4_IN(b) in_dword_masked(VMIDMT_IDR4_ADDR(b), VMIDMT_IDR4_RMSK) 299 #define VMIDMT_IDR4_INM(b, m) in_dword_masked(VMIDMT_IDR4_ADDR(b), (m)) 300 301 #define VMIDMT_IDR4_MAJOR_BMSK 0xf0000000 302 #define VMIDMT_IDR4_MAJOR_SHFT 0x1c 303 #define VMIDMT_IDR4_MINOR_BMSK 0x000f0000 304 #define VMIDMT_IDR4_MINOR_SHFT 0x10 305 #define VMIDMT_IDR4_STEP_BMSK 0x0000ffff 306 #define VMIDMT_IDR4_STEP_SHFT 0x00 307 308 #define VMIDMT_IDR5_ADDR(b) (b + 0x00000034) 309 #define VMIDMT_IDR5_PHYS(b) (b + 0x00000034) 310 #define VMIDMT_IDR5_RMSK 0xffffffff 311 #define VMIDMT_IDR5_SHFT 0 312 #define VMIDMT_IDR5_IN(b) in_dword_masked(VMIDMT_IDR5_ADDR(b), VMIDMT_IDR5_RMSK) 313 #define VMIDMT_IDR5_INM(b, m) in_dword_masked(VMIDMT_IDR5_ADDR(b), (m)) 314 315 #define VMIDMT_IDR5_NUMMSDRB_BMSK 0x00ff0000 316 #define VMIDMT_IDR5_NUMMSDRB_SHFT 0x10 317 #define VMIDMT_IDR5_MSAE_BMSK 0x00000200 318 #define VMIDMT_IDR5_MSAE_SHFT 0x09 319 #define VMIDMT_IDR5_QRIBE_BMSK 0x00000100 320 #define VMIDMT_IDR5_QRIBE_SHFT 0x08 321 #define VMIDMT_IDR5_NVMID_BMSK 0x000000ff 322 #define VMIDMT_IDR5_NVMID_SHFT 0x00 323 324 #define VMIDMT_IDR7_ADDR(b) (b + 0x0000003c) 325 #define VMIDMT_IDR7_PHYS(b) (b + 0x0000003c) 326 #define VMIDMT_IDR7_RMSK 0x000000ff 327 #define VMIDMT_IDR7_SHFT 0 328 #define VMIDMT_IDR7_IN(b) in_dword_masked(VMIDMT_IDR7_ADDR(b), VMIDMT_IDR7_RMSK) 329 #define VMIDMT_IDR7_INM(b, m) in_dword_masked(VMIDMT_IDR7_ADDR(b), (m)) 330 331 #define VMIDMT_IDR7_MAJOR_BMSK 0x000000f0 332 #define VMIDMT_IDR7_MAJOR_SHFT 0x04 333 #define VMIDMT_IDR7_MINOR_BMSK 0x0000000f 334 #define VMIDMT_IDR7_MINOR_SHFT 0x00 335 336 #define VMIDMT_SGFAR0_ADDR(b) (b + 0x00000040) 337 #define VMIDMT_SGFAR0_PHYS(b) (b + 0x00000040) 338 #define VMIDMT_SGFAR0_RMSK 0xffffffff 339 #define VMIDMT_SGFAR0_SHFT 0 340 #define VMIDMT_SGFAR0_IN(b) \ 341 in_dword_masked(VMIDMT_SGFAR0_ADDR(b), VMIDMT_SGFAR0_RMSK) 342 #define VMIDMT_SGFAR0_INM(b, m) in_dword_masked(VMIDMT_SGFAR0_ADDR(b), (m)) 343 #define VMIDMT_SGFAR0_OUT(b, v) mmio_write_32(VMIDMT_SGFAR0_ADDR(b), (v)) 344 #define VMIDMT_SGFAR0_OUTM(b, m, v) \ 345 out_dword_masked_ns(VMIDMT_SGFAR0_ADDR(b), (m), (v), \ 346 VMIDMT_SGFAR0_IN(b)) 347 348 #define VMIDMT_SGFAR0_ADDR_BMSK 0xffffffff 349 #define VMIDMT_SGFAR0_ADDR_SHFT 0x00 350 351 #define VMIDMT_SGFAR1_ADDR(b) (b + 0x00000044) 352 #define VMIDMT_SGFAR1_PHYS(b) (b + 0x00000044) 353 #define VMIDMT_SGFAR1_RMSK 0xffffffff 354 #define VMIDMT_SGFAR1_SHFT 0 355 #define VMIDMT_SGFAR1_IN(b) \ 356 in_dword_masked(VMIDMT_SGFAR1_ADDR(b), VMIDMT_SGFAR1_RMSK) 357 #define VMIDMT_SGFAR1_INM(b, m) in_dword_masked(VMIDMT_SGFAR1_ADDR(b), (m)) 358 #define VMIDMT_SGFAR1_OUT(b, v) mmio_write_32(VMIDMT_SGFAR1_ADDR(b), (v)) 359 #define VMIDMT_SGFAR1_OUTM(b, m, v) \ 360 out_dword_masked_ns(VMIDMT_SGFAR1_ADDR(b), (m), (v), \ 361 VMIDMT_SGFAR1_IN(b)) 362 363 #define VMIDMT_SGFAR1_ADDR_BMSK 0xffffffff 364 #define VMIDMT_SGFAR1_ADDR_SHFT 0x00 365 366 #define VMIDMT_GFAR0_ADDR(b) (b + 0x00000040) 367 #define VMIDMT_GFAR0_PHYS(b) (b + 0x00000040) 368 #define VMIDMT_GFAR0_RMSK 0xffffffff 369 #define VMIDMT_GFAR0_SHFT 0 370 #define VMIDMT_GFAR0_IN(b) \ 371 in_dword_masked(VMIDMT_GFAR0_ADDR(b), VMIDMT_GFAR0_RMSK) 372 #define VMIDMT_GFAR0_INM(b, m) in_dword_masked(VMIDMT_GFAR0_ADDR(b), (m)) 373 #define VMIDMT_GFAR0_OUT(b, v) mmio_write_32(VMIDMT_GFAR0_ADDR(b), (v)) 374 #define VMIDMT_GFAR0_OUTM(b, m, v) \ 375 out_dword_masked_ns(VMIDMT_GFAR0_ADDR(b), (m), (v), VMIDMT_GFAR0_IN(b)) 376 377 #define VMIDMT_GFAR0_ADDR_BMSK 0xffffffff 378 #define VMIDMT_GFAR0_ADDR_SHFT 0x00 379 380 #define VMIDMT_GFAR1_ADDR(b) (b + 0x00000044) 381 #define VMIDMT_GFAR1_PHYS(b) (b + 0x00000044) 382 #define VMIDMT_GFAR1_RMSK 0xffffffff 383 #define VMIDMT_GFAR1_SHFT 0 384 #define VMIDMT_GFAR1_IN(b) \ 385 in_dword_masked(VMIDMT_GFAR1_ADDR(b), VMIDMT_GFAR1_RMSK) 386 #define VMIDMT_GFAR1_INM(b, m) in_dword_masked(VMIDMT_GFAR1_ADDR(b), (m)) 387 #define VMIDMT_GFAR1_OUT(b, v) mmio_write_32(VMIDMT_GFAR1_ADDR(b), (v)) 388 #define VMIDMT_GFAR1_OUTM(b, m, v) \ 389 out_dword_masked_ns(VMIDMT_GFAR1_ADDR(b), (m), (v), VMIDMT_GFAR1_IN(b)) 390 391 #define VMIDMT_GFAR1_ADDR_BMSK 0xffffffff 392 #define VMIDMT_GFAR1_ADDR_SHFT 0x00 393 394 #define VMIDMT_NSGFAR0_ADDR(b) (b + 0x00000440) 395 #define VMIDMT_NSGFAR0_PHYS(b) (b + 0x00000440) 396 #define VMIDMT_NSGFAR0_RMSK 0xffffffff 397 #define VMIDMT_NSGFAR0_SHFT 0 398 #define VMIDMT_NSGFAR0_IN(b) \ 399 in_dword_masked(VMIDMT_NSGFAR0_ADDR(b), VMIDMT_NSGFAR0_RMSK) 400 #define VMIDMT_NSGFAR0_INM(b, m) in_dword_masked(VMIDMT_NSGFAR0_ADDR(b), (m)) 401 #define VMIDMT_NSGFAR0_OUT(b, v) mmio_write_32(VMIDMT_NSGFAR0_ADDR(b), (v)) 402 #define VMIDMT_NSGFAR0_OUTM(b, m, v) \ 403 out_dword_masked_ns(VMIDMT_NSGFAR0_ADDR(b), (m), (v), \ 404 VMIDMT_NSGFAR0_IN(b)) 405 406 #define VMIDMT_NSGFAR0_ADDR_BMSK 0xffffffff 407 #define VMIDMT_NSGFAR0_ADDR_SHFT 0x00 408 409 #define VMIDMT_NSGFAR1_ADDR(b) (b + 0x00000444) 410 #define VMIDMT_NSGFAR1_PHYS(b) (b + 0x00000444) 411 #define VMIDMT_NSGFAR1_RMSK 0xffffffff 412 #define VMIDMT_NSGFAR1_SHFT 0 413 #define VMIDMT_NSGFAR1_IN(b) \ 414 in_dword_masked(VMIDMT_NSGFAR1_ADDR(b), VMIDMT_NSGFAR1_RMSK) 415 #define VMIDMT_NSGFAR1_INM(b, m) in_dword_masked(VMIDMT_NSGFAR1_ADDR(b), (m)) 416 #define VMIDMT_NSGFAR1_OUT(b, v) mmio_write_32(VMIDMT_NSGFAR1_ADDR(b), (v)) 417 #define VMIDMT_NSGFAR1_OUTM(b, m, v) \ 418 out_dword_masked_ns(VMIDMT_NSGFAR1_ADDR(b), (m), (v), \ 419 VMIDMT_NSGFAR1_IN(b)) 420 421 #define VMIDMT_NSGFAR1_ADDR_BMSK 0xffffffff 422 #define VMIDMT_NSGFAR1_ADDR_SHFT 0x00 423 424 #define VMIDMT_SGFSR_ADDR(b) (b + 0x00000048) 425 #define VMIDMT_SGFSR_PHYS(b) (b + 0x00000048) 426 #define VMIDMT_SGFSR_RMSK 0xc00000a6 427 #define VMIDMT_SGFSR_SHFT 0 428 #define VMIDMT_SGFSR_IN(b) \ 429 in_dword_masked(VMIDMT_SGFSR_ADDR(b), VMIDMT_SGFSR_RMSK) 430 #define VMIDMT_SGFSR_INM(b, m) in_dword_masked(VMIDMT_SGFSR_ADDR(b), (m)) 431 #define VMIDMT_SGFSR_OUT(b, v) mmio_write_32(VMIDMT_SGFSR_ADDR(b), (v)) 432 #define VMIDMT_SGFSR_OUTM(b, m, v) \ 433 out_dword_masked_ns(VMIDMT_SGFSR_ADDR(b), (m), (v), VMIDMT_SGFSR_IN(b)) 434 435 #define VMIDMT_SGFSR_CLMULTI_BMSK 0x80000000 436 #define VMIDMT_SGFSR_CLMULTI_SHFT 0x1f 437 #define VMIDMT_SGFSR_CFGMULTI_BMSK 0x40000000 438 #define VMIDMT_SGFSR_CFGMULTI_SHFT 0x1e 439 #define VMIDMT_SGFSR_PF_BMSK 0x00000080 440 #define VMIDMT_SGFSR_PF_SHFT 0x07 441 #define VMIDMT_SGFSR_CAF_BMSK 0x00000020 442 #define VMIDMT_SGFSR_CAF_SHFT 0x05 443 #define VMIDMT_SGFSR_SMCF_BMSK 0x00000004 444 #define VMIDMT_SGFSR_SMCF_SHFT 0x02 445 #define VMIDMT_SGFSR_USF_BMSK 0x00000002 446 #define VMIDMT_SGFSR_USF_SHFT 0x01 447 448 #define VMIDMT_GFSR_ADDR(b) (b + 0x00000048) 449 #define VMIDMT_GFSR_PHYS(b) (b + 0x00000048) 450 #define VMIDMT_GFSR_RMSK 0xc00000a6 451 #define VMIDMT_GFSR_SHFT 0 452 #define VMIDMT_GFSR_IN(b) in_dword_masked(VMIDMT_GFSR_ADDR(b), VMIDMT_GFSR_RMSK) 453 #define VMIDMT_GFSR_INM(b, m) in_dword_masked(VMIDMT_GFSR_ADDR(b), (m)) 454 #define VMIDMT_GFSR_OUT(b, v) mmio_write_32(VMIDMT_GFSR_ADDR(b), (v)) 455 #define VMIDMT_GFSR_OUTM(b, m, v) \ 456 out_dword_masked_ns(VMIDMT_GFSR_ADDR(b), (m), (v), VMIDMT_GFSR_IN(b)) 457 458 #define VMIDMT_GFSR_CLMULTI_BMSK 0x80000000 459 #define VMIDMT_GFSR_CLMULTI_SHFT 0x1f 460 #define VMIDMT_GFSR_CFGMULTI_BMSK 0x40000000 461 #define VMIDMT_GFSR_CFGMULTI_SHFT 0x1e 462 #define VMIDMT_GFSR_PF_BMSK 0x00000080 463 #define VMIDMT_GFSR_PF_SHFT 0x07 464 #define VMIDMT_GFSR_CAF_BMSK 0x00000020 465 #define VMIDMT_GFSR_CAF_SHFT 0x05 466 #define VMIDMT_GFSR_SMCF_BMSK 0x00000004 467 #define VMIDMT_GFSR_SMCF_SHFT 0x02 468 #define VMIDMT_GFSR_USF_BMSK 0x00000002 469 #define VMIDMT_GFSR_USF_SHFT 0x01 470 471 #define VMIDMT_NSGFSR_ADDR(b) (b + 0x00000448) 472 #define VMIDMT_NSGFSR_PHYS(b) (b + 0x00000448) 473 #define VMIDMT_NSGFSR_RMSK 0xc00000a6 474 #define VMIDMT_NSGFSR_SHFT 0 475 #define VMIDMT_NSGFSR_IN(b) \ 476 in_dword_masked(VMIDMT_NSGFSR_ADDR(b), VMIDMT_NSGFSR_RMSK) 477 #define VMIDMT_NSGFSR_INM(b, m) in_dword_masked(VMIDMT_NSGFSR_ADDR(b), (m)) 478 #define VMIDMT_NSGFSR_OUT(b, v) mmio_write_32(VMIDMT_NSGFSR_ADDR(b), (v)) 479 #define VMIDMT_NSGFSR_OUTM(b, m, v) \ 480 out_dword_masked_ns(VMIDMT_NSGFSR_ADDR(b), (m), (v), \ 481 VMIDMT_NSGFSR_IN(b)) 482 483 #define VMIDMT_NSGFSR_CLMULTI_BMSK 0x80000000 484 #define VMIDMT_NSGFSR_CLMULTI_SHFT 0x1f 485 #define VMIDMT_NSGFSR_CFGMULTI_BMSK 0x40000000 486 #define VMIDMT_NSGFSR_CFGMULTI_SHFT 0x1e 487 #define VMIDMT_NSGFSR_PF_BMSK 0x00000080 488 #define VMIDMT_NSGFSR_PF_SHFT 0x07 489 #define VMIDMT_NSGFSR_CAF_BMSK 0x00000020 490 #define VMIDMT_NSGFSR_CAF_SHFT 0x05 491 #define VMIDMT_NSGFSR_SMCF_BMSK 0x00000004 492 #define VMIDMT_NSGFSR_SMCF_SHFT 0x02 493 #define VMIDMT_NSGFSR_USF_BMSK 0x00000002 494 #define VMIDMT_NSGFSR_USF_SHFT 0x01 495 496 #define VMIDMT_SGFSRRESTORE_ADDR(b) (b + 0x0000004c) 497 #define VMIDMT_SGFSRRESTORE_PHYS(b) (b + 0x0000004c) 498 #define VMIDMT_SGFSRRESTORE_RMSK 0xc00000a6 499 #define VMIDMT_SGFSRRESTORE_SHFT 0 500 #define VMIDMT_SGFSRRESTORE_IN(b) \ 501 in_dword_masked(VMIDMT_SGFSRRESTORE_ADDR(b), VMIDMT_SGFSRRESTORE_RMSK) 502 #define VMIDMT_SGFSRRESTORE_INM(b, m) \ 503 in_dword_masked(VMIDMT_SGFSRRESTORE_ADDR(b), (m)) 504 #define VMIDMT_SGFSRRESTORE_OUT(b, v) \ 505 mmio_write_32(VMIDMT_SGFSRRESTORE_ADDR(b), (v)) 506 #define VMIDMT_SGFSRRESTORE_OUTM(b, m, v) \ 507 out_dword_masked_ns(VMIDMT_SGFSRRESTORE_ADDR(b), (m), (v), \ 508 VMIDMT_SGFSRRESTORE_IN(b)) 509 510 #define VMIDMT_SGFSRRESTORE_CLMULTI_BMSK 0x80000000 511 #define VMIDMT_SGFSRRESTORE_CLMULTI_SHFT 0x1f 512 #define VMIDMT_SGFSRRESTORE_CFGMULTI_BMSK 0x40000000 513 #define VMIDMT_SGFSRRESTORE_CFGMULTI_SHFT 0x1e 514 #define VMIDMT_SGFSRRESTORE_PF_BMSK 0x00000080 515 #define VMIDMT_SGFSRRESTORE_PF_SHFT 0x07 516 #define VMIDMT_SGFSRRESTORE_CAF_BMSK 0x00000020 517 #define VMIDMT_SGFSRRESTORE_CAF_SHFT 0x05 518 #define VMIDMT_SGFSRRESTORE_SMCF_BMSK 0x00000004 519 #define VMIDMT_SGFSRRESTORE_SMCF_SHFT 0x02 520 #define VMIDMT_SGFSRRESTORE_USF_BMSK 0x00000002 521 #define VMIDMT_SGFSRRESTORE_USF_SHFT 0x01 522 523 #define VMIDMT_GFSRRESTORE_ADDR(b) (b + 0x0000004c) 524 #define VMIDMT_GFSRRESTORE_PHYS(b) (b + 0x0000004c) 525 #define VMIDMT_GFSRRESTORE_RMSK 0xc00000a6 526 #define VMIDMT_GFSRRESTORE_SHFT 0 527 #define VMIDMT_GFSRRESTORE_IN(b) \ 528 in_dword_masked(VMIDMT_GFSRRESTORE_ADDR(b), VMIDMT_GFSRRESTORE_RMSK) 529 #define VMIDMT_GFSRRESTORE_INM(b, m) \ 530 in_dword_masked(VMIDMT_GFSRRESTORE_ADDR(b), (m)) 531 #define VMIDMT_GFSRRESTORE_OUT(b, v) \ 532 mmio_write_32(VMIDMT_GFSRRESTORE_ADDR(b), (v)) 533 #define VMIDMT_GFSRRESTORE_OUTM(b, m, v) \ 534 out_dword_masked_ns(VMIDMT_GFSRRESTORE_ADDR(b), (m), (v), \ 535 VMIDMT_GFSRRESTORE_IN(b)) 536 537 #define VMIDMT_GFSRRESTORE_CLMULTI_BMSK 0x80000000 538 #define VMIDMT_GFSRRESTORE_CLMULTI_SHFT 0x1f 539 #define VMIDMT_GFSRRESTORE_CFGMULTI_BMSK 0x40000000 540 #define VMIDMT_GFSRRESTORE_CFGMULTI_SHFT 0x1e 541 #define VMIDMT_GFSRRESTORE_PF_BMSK 0x00000080 542 #define VMIDMT_GFSRRESTORE_PF_SHFT 0x07 543 #define VMIDMT_GFSRRESTORE_CAF_BMSK 0x00000020 544 #define VMIDMT_GFSRRESTORE_CAF_SHFT 0x05 545 #define VMIDMT_GFSRRESTORE_SMCF_BMSK 0x00000004 546 #define VMIDMT_GFSRRESTORE_SMCF_SHFT 0x02 547 #define VMIDMT_GFSRRESTORE_USF_BMSK 0x00000002 548 #define VMIDMT_GFSRRESTORE_USF_SHFT 0x01 549 550 #define VMIDMT_NSGFSRRESTORE_ADDR(b) (b + 0x0000044c) 551 #define VMIDMT_NSGFSRRESTORE_PHYS(b) (b + 0x0000044c) 552 #define VMIDMT_NSGFSRRESTORE_RMSK 0xc00000a6 553 #define VMIDMT_NSGFSRRESTORE_SHFT 0 554 #define VMIDMT_NSGFSRRESTORE_IN(b) \ 555 in_dword_masked(VMIDMT_NSGFSRRESTORE_ADDR(b), VMIDMT_NSGFSRRESTORE_RMSK) 556 #define VMIDMT_NSGFSRRESTORE_INM(b, m) \ 557 in_dword_masked(VMIDMT_NSGFSRRESTORE_ADDR(b), (m)) 558 #define VMIDMT_NSGFSRRESTORE_OUT(b, v) \ 559 mmio_write_32(VMIDMT_NSGFSRRESTORE_ADDR(b), (v)) 560 #define VMIDMT_NSGFSRRESTORE_OUTM(b, m, v) \ 561 out_dword_masked_ns(VMIDMT_NSGFSRRESTORE_ADDR(b), (m), (v), \ 562 VMIDMT_NSGFSRRESTORE_IN(b)) 563 564 #define VMIDMT_NSGFSRRESTORE_CLMULTI_BMSK 0x80000000 565 #define VMIDMT_NSGFSRRESTORE_CLMULTI_SHFT 0x1f 566 #define VMIDMT_NSGFSRRESTORE_CFGMULTI_BMSK 0x40000000 567 #define VMIDMT_NSGFSRRESTORE_CFGMULTI_SHFT 0x1e 568 #define VMIDMT_NSGFSRRESTORE_PF_BMSK 0x00000080 569 #define VMIDMT_NSGFSRRESTORE_PF_SHFT 0x07 570 #define VMIDMT_NSGFSRRESTORE_CAF_BMSK 0x00000020 571 #define VMIDMT_NSGFSRRESTORE_CAF_SHFT 0x05 572 #define VMIDMT_NSGFSRRESTORE_SMCF_BMSK 0x00000004 573 #define VMIDMT_NSGFSRRESTORE_SMCF_SHFT 0x02 574 #define VMIDMT_NSGFSRRESTORE_USF_BMSK 0x00000002 575 #define VMIDMT_NSGFSRRESTORE_USF_SHFT 0x01 576 577 #define VMIDMT_SGFSYNDR0_ADDR(b) (b + 0x00000050) 578 #define VMIDMT_SGFSYNDR0_PHYS(b) (b + 0x00000050) 579 #define VMIDMT_SGFSYNDR0_RMSK 0x000001ff 580 #define VMIDMT_SGFSYNDR0_SHFT 0 581 #define VMIDMT_SGFSYNDR0_IN(b) \ 582 in_dword_masked(VMIDMT_SGFSYNDR0_ADDR(b), VMIDMT_SGFSYNDR0_RMSK) 583 #define VMIDMT_SGFSYNDR0_INM(b, m) \ 584 in_dword_masked(VMIDMT_SGFSYNDR0_ADDR(b), (m)) 585 586 #define VMIDMT_SGFSYNDR0_MSA_STATE_BMSK 0x00000100 587 #define VMIDMT_SGFSYNDR0_MSA_STATE_SHFT 0x08 588 #define VMIDMT_SGFSYNDR0_NSATTR_BMSK 0x00000020 589 #define VMIDMT_SGFSYNDR0_NSATTR_SHFT 0x05 590 #define VMIDMT_SGFSYNDR0_NSSTATE_BMSK 0x00000010 591 #define VMIDMT_SGFSYNDR0_NSSTATE_SHFT 0x04 592 #define VMIDMT_SGFSYNDR0_WNR_BMSK 0x00000002 593 #define VMIDMT_SGFSYNDR0_WNR_SHFT 0x01 594 595 #define VMIDMT_GFSYNDR0_ADDR(b) (b + 0x00000050) 596 #define VMIDMT_GFSYNDR0_PHYS(b) (b + 0x00000050) 597 #define VMIDMT_GFSYNDR0_RMSK 0x000001ff 598 #define VMIDMT_GFSYNDR0_SHFT 0 599 #define VMIDMT_GFSYNDR0_IN(b) \ 600 in_dword_masked(VMIDMT_GFSYNDR0_ADDR(b), VMIDMT_GFSYNDR0_RMSK) 601 #define VMIDMT_GFSYNDR0_INM(b, m) in_dword_masked(VMIDMT_GFSYNDR0_ADDR(b), (m)) 602 603 #define VMIDMT_GFSYNDR0_MSA_STATE_BMSK 0x00000100 604 #define VMIDMT_GFSYNDR0_MSA_STATE_SHFT 0x08 605 #define VMIDMT_GFSYNDR0_NSATTR_BMSK 0x00000020 606 #define VMIDMT_GFSYNDR0_NSATTR_SHFT 0x05 607 #define VMIDMT_GFSYNDR0_NSSTATE_BMSK 0x00000010 608 #define VMIDMT_GFSYNDR0_NSSTATE_SHFT 0x04 609 #define VMIDMT_GFSYNDR0_WNR_BMSK 0x00000002 610 #define VMIDMT_GFSYNDR0_WNR_SHFT 0x01 611 612 #define VMIDMT_NSGFSYNDR0_ADDR(b) (b + 0x00000450) 613 #define VMIDMT_NSGFSYNDR0_PHYS(b) (b + 0x00000450) 614 #define VMIDMT_NSGFSYNDR0_RMSK 0x000001ff 615 #define VMIDMT_NSGFSYNDR0_SHFT 0 616 #define VMIDMT_NSGFSYNDR0_IN(b) \ 617 in_dword_masked(VMIDMT_NSGFSYNDR0_ADDR(b), VMIDMT_NSGFSYNDR0_RMSK) 618 #define VMIDMT_NSGFSYNDR0_INM(b, m) \ 619 in_dword_masked(VMIDMT_NSGFSYNDR0_ADDR(b), (m)) 620 621 #define VMIDMT_NSGFSYNDR0_MSA_STATE_BMSK 0x00000100 622 #define VMIDMT_NSGFSYNDR0_MSA_STATE_SHFT 0x08 623 #define VMIDMT_NSGFSYNDR0_NSATTR_BMSK 0x00000020 624 #define VMIDMT_NSGFSYNDR0_NSATTR_SHFT 0x05 625 #define VMIDMT_NSGFSYNDR0_NSSTATE_BMSK 0x00000010 626 #define VMIDMT_NSGFSYNDR0_NSSTATE_SHFT 0x04 627 #define VMIDMT_NSGFSYNDR0_WNR_BMSK 0x00000002 628 #define VMIDMT_NSGFSYNDR0_WNR_SHFT 0x01 629 630 #define VMIDMT_SGFSYNDR1_ADDR(b) (b + 0x00000054) 631 #define VMIDMT_SGFSYNDR1_PHYS(b) (b + 0x00000054) 632 #define VMIDMT_SGFSYNDR1_RMSK 0xffffffff 633 #define VMIDMT_SGFSYNDR1_SHFT 0 634 #define VMIDMT_SGFSYNDR1_IN(b) \ 635 in_dword_masked(VMIDMT_SGFSYNDR1_ADDR(b), VMIDMT_SGFSYNDR1_RMSK) 636 #define VMIDMT_SGFSYNDR1_INM(b, m) \ 637 in_dword_masked(VMIDMT_SGFSYNDR1_ADDR(b), (m)) 638 639 #define VMIDMT_SGFSYNDR1_MSD_INDEX_BMSK 0xff000000 640 #define VMIDMT_SGFSYNDR1_MSD_INDEX_SHFT 0x18 641 #define VMIDMT_SGFSYNDR1_SSD_INDEX_BMSK 0x00ff0000 642 #define VMIDMT_SGFSYNDR1_SSD_INDEX_SHFT 0x10 643 #define VMIDMT_SGFSYNDR1_SID_BMSK 0x00007fff 644 #define VMIDMT_SGFSYNDR1_SID_SHFT 0x00 645 646 #define VMIDMT_GFSYNDR1_ADDR(b) (b + 0x00000054) 647 #define VMIDMT_GFSYNDR1_PHYS(b) (b + 0x00000054) 648 #define VMIDMT_GFSYNDR1_RMSK 0xffffffff 649 #define VMIDMT_GFSYNDR1_SHFT 0 650 #define VMIDMT_GFSYNDR1_IN(b) \ 651 in_dword_masked(VMIDMT_GFSYNDR1_ADDR(b), VMIDMT_GFSYNDR1_RMSK) 652 #define VMIDMT_GFSYNDR1_INM(b, m) in_dword_masked(VMIDMT_GFSYNDR1_ADDR(b), (m)) 653 654 #define VMIDMT_GFSYNDR1_MSD_INDEX_BMSK 0xff000000 655 #define VMIDMT_GFSYNDR1_MSD_INDEX_SHFT 0x18 656 #define VMIDMT_GFSYNDR1_SSD_INDEX_BMSK 0x00ff0000 657 #define VMIDMT_GFSYNDR1_SSD_INDEX_SHFT 0x10 658 #define VMIDMT_GFSYNDR1_SID_BMSK 0x00007fff 659 #define VMIDMT_GFSYNDR1_SID_SHFT 0x00 660 661 #define VMIDMT_NSGFSYNDR1_ADDR(b) (b + 0x00000454) 662 #define VMIDMT_NSGFSYNDR1_PHYS(b) (b + 0x00000454) 663 #define VMIDMT_NSGFSYNDR1_RMSK 0xffffffff 664 #define VMIDMT_NSGFSYNDR1_SHFT 0 665 #define VMIDMT_NSGFSYNDR1_IN(b) \ 666 in_dword_masked(VMIDMT_NSGFSYNDR1_ADDR(b), VMIDMT_NSGFSYNDR1_RMSK) 667 #define VMIDMT_NSGFSYNDR1_INM(b, m) \ 668 in_dword_masked(VMIDMT_NSGFSYNDR1_ADDR(b), (m)) 669 670 #define VMIDMT_NSGFSYNDR1_MSD_INDEX_BMSK 0xff000000 671 #define VMIDMT_NSGFSYNDR1_MSD_INDEX_SHFT 0x18 672 #define VMIDMT_NSGFSYNDR1_SSD_INDEX_BMSK 0x00ff0000 673 #define VMIDMT_NSGFSYNDR1_SSD_INDEX_SHFT 0x10 674 #define VMIDMT_NSGFSYNDR1_SID_BMSK 0x00007fff 675 #define VMIDMT_NSGFSYNDR1_SID_SHFT 0x00 676 677 #define VMIDMT_SGFSYNDR2_ADDR(b) (b + 0x00000058) 678 #define VMIDMT_SGFSYNDR2_PHYS(b) (b + 0x00000058) 679 #define VMIDMT_SGFSYNDR2_RMSK 0xffffffff 680 #define VMIDMT_SGFSYNDR2_SHFT 0 681 #define VMIDMT_SGFSYNDR2_IN(b) \ 682 in_dword_masked(VMIDMT_SGFSYNDR2_ADDR(b), VMIDMT_SGFSYNDR2_RMSK) 683 #define VMIDMT_SGFSYNDR2_INM(b, m) \ 684 in_dword_masked(VMIDMT_SGFSYNDR2_ADDR(b), (m)) 685 686 #define VMIDMT_SGFSYNDR2_ATID_BMSK 0xff000000 687 #define VMIDMT_SGFSYNDR2_ATID_SHFT 0x18 688 #define VMIDMT_SGFSYNDR2_AVMID_BMSK 0x00ff0000 689 #define VMIDMT_SGFSYNDR2_AVMID_SHFT 0x10 690 #define VMIDMT_SGFSYNDR2_ABID_BMSK 0x0000e000 691 #define VMIDMT_SGFSYNDR2_ABID_SHFT 0x0d 692 #define VMIDMT_SGFSYNDR2_APID_BMSK 0x00001f00 693 #define VMIDMT_SGFSYNDR2_APID_SHFT 0x08 694 #define VMIDMT_SGFSYNDR2_AMID_BMSK 0x000000ff 695 #define VMIDMT_SGFSYNDR2_AMID_SHFT 0x00 696 697 #define VMIDMT_GFSYNDR2_ADDR(b) (b + 0x00000058) 698 #define VMIDMT_GFSYNDR2_PHYS(b) (b + 0x00000058) 699 #define VMIDMT_GFSYNDR2_RMSK 0xffffffff 700 #define VMIDMT_GFSYNDR2_SHFT 0 701 #define VMIDMT_GFSYNDR2_IN(b) \ 702 in_dword_masked(VMIDMT_GFSYNDR2_ADDR(b), VMIDMT_GFSYNDR2_RMSK) 703 #define VMIDMT_GFSYNDR2_INM(b, m) in_dword_masked(VMIDMT_GFSYNDR2_ADDR(b), (m)) 704 705 #define VMIDMT_GFSYNDR2_ATID_BMSK 0xff000000 706 #define VMIDMT_GFSYNDR2_ATID_SHFT 0x18 707 #define VMIDMT_GFSYNDR2_AVMID_BMSK 0x00ff0000 708 #define VMIDMT_GFSYNDR2_AVMID_SHFT 0x10 709 #define VMIDMT_GFSYNDR2_ABID_BMSK 0x0000e000 710 #define VMIDMT_GFSYNDR2_ABID_SHFT 0x0d 711 #define VMIDMT_GFSYNDR2_APID_BMSK 0x00001f00 712 #define VMIDMT_GFSYNDR2_APID_SHFT 0x08 713 #define VMIDMT_GFSYNDR2_AMID_BMSK 0x000000ff 714 #define VMIDMT_GFSYNDR2_AMID_SHFT 0x00 715 716 #define VMIDMT_NSGFSYNDR2_ADDR(b) (b + 0x00000458) 717 #define VMIDMT_NSGFSYNDR2_PHYS(b) (b + 0x00000458) 718 #define VMIDMT_NSGFSYNDR2_RMSK 0xffffffff 719 #define VMIDMT_NSGFSYNDR2_SHFT 0 720 #define VMIDMT_NSGFSYNDR2_IN(b) \ 721 in_dword_masked(VMIDMT_NSGFSYNDR2_ADDR(b), VMIDMT_NSGFSYNDR2_RMSK) 722 #define VMIDMT_NSGFSYNDR2_INM(b, m) \ 723 in_dword_masked(VMIDMT_NSGFSYNDR2_ADDR(b), (m)) 724 725 #define VMIDMT_NSGFSYNDR2_ATID_BMSK 0xff000000 726 #define VMIDMT_NSGFSYNDR2_ATID_SHFT 0x18 727 #define VMIDMT_NSGFSYNDR2_AVMID_BMSK 0x00ff0000 728 #define VMIDMT_NSGFSYNDR2_AVMID_SHFT 0x10 729 #define VMIDMT_NSGFSYNDR2_ABID_BMSK 0x0000e000 730 #define VMIDMT_NSGFSYNDR2_ABID_SHFT 0x0d 731 #define VMIDMT_NSGFSYNDR2_APID_BMSK 0x00001f00 732 #define VMIDMT_NSGFSYNDR2_APID_SHFT 0x08 733 #define VMIDMT_NSGFSYNDR2_AMID_BMSK 0x000000ff 734 #define VMIDMT_NSGFSYNDR2_AMID_SHFT 0x00 735 736 #define VMIDMT_SSDRn_ADDR(b, n) (b + 0x00000080 + 4 * (n)) 737 #define VMIDMT_SSDRn_PHYS(b, n) (b + 0x00000080 + 4 * (n)) 738 #define VMIDMT_SSDRn_RMSK 0xffffffff 739 #define VMIDMT_SSDRn_SHFT 0 740 #define VMIDMT_SSDRn_INI(b, n) mmio_read_32(VMIDMT_SSDRn_ADDR(b, (n))) 741 #define VMIDMT_SSDRn_INMI(b, n, mask) \ 742 in_dword_masked(VMIDMT_SSDRn_ADDR(b, (n)), (mask)) 743 #define VMIDMT_SSDRn_OUTI(b, n, val) \ 744 mmio_write_32(VMIDMT_SSDRn_ADDR(b, (n)), (val)) 745 #define VMIDMT_SSDRn_OUTMI(b, n, mask, val) \ 746 out_dword_masked_ns(VMIDMT_SSDRn_ADDR(b, (n)), (mask), (val), \ 747 VMIDMT_SSDRn_INI(b, (n))) 748 749 #define VMIDMT_SSDRn_NS_STATE_BMSK 0xffffffff 750 #define VMIDMT_SSDRn_NS_STATE_SHFT 0x00 751 752 #define VMIDMT_SVMIDMTCR0_ADDR(b) (b + 0x00000090) 753 #define VMIDMT_SVMIDMTCR0_PHYS(b) (b + 0x00000090) 754 #define VMIDMT_SVMIDMTCR0_RMSK 0x00000001 755 #define VMIDMT_SVMIDMTCR0_SHFT 0 756 #define VMIDMT_SVMIDMTCR0_IN(b) \ 757 in_dword_masked(VMIDMT_SVMIDMTCR0_ADDR(b), VMIDMT_SVMIDMTCR0_RMSK) 758 #define VMIDMT_SVMIDMTCR0_INM(b, m) \ 759 in_dword_masked(VMIDMT_SVMIDMTCR0_ADDR(b), (m)) 760 #define VMIDMT_SVMIDMTCR0_OUT(b, v) \ 761 mmio_write_32(VMIDMT_SVMIDMTCR0_ADDR(b), (v)) 762 #define VMIDMT_SVMIDMTCR0_OUTM(b, m, v) \ 763 out_dword_masked_ns(VMIDMT_SVMIDMTCR0_ADDR(b), (m), (v), \ 764 VMIDMT_SVMIDMTCR0_IN(b)) 765 766 #define VMIDMT_SVMIDMTCR0_CLKONOFFE_BMSK 0x00000001 767 #define VMIDMT_SVMIDMTCR0_CLKONOFFE_SHFT 0x00 768 769 #define VMIDMT_VMIDMTCR0_ADDR(b) (b + 0x00000090) 770 #define VMIDMT_VMIDMTCR0_PHYS(b) (b + 0x00000090) 771 #define VMIDMT_VMIDMTCR0_RMSK 0x00000001 772 #define VMIDMT_VMIDMTCR0_SHFT 0 773 #define VMIDMT_VMIDMTCR0_IN(b) \ 774 in_dword_masked(VMIDMT_VMIDMTCR0_ADDR(b), VMIDMT_VMIDMTCR0_RMSK) 775 #define VMIDMT_VMIDMTCR0_INM(b, m) \ 776 in_dword_masked(VMIDMT_VMIDMTCR0_ADDR(b), (m)) 777 #define VMIDMT_VMIDMTCR0_OUT(b, v) mmio_write_32(VMIDMT_VMIDMTCR0_ADDR(b), (v)) 778 #define VMIDMT_VMIDMTCR0_OUTM(b, m, v) \ 779 out_dword_masked_ns(VMIDMT_VMIDMTCR0_ADDR(b), (m), (v), \ 780 VMIDMT_VMIDMTCR0_IN(b)) 781 782 #define VMIDMT_VMIDMTCR0_CLKONOFFE_BMSK 0x00000001 783 #define VMIDMT_VMIDMTCR0_CLKONOFFE_SHFT 0x00 784 785 #define VMIDMT_NSVMIDMTCR0_ADDR(b) (b + 0x00000490) 786 #define VMIDMT_NSVMIDMTCR0_PHYS(b) (b + 0x00000490) 787 #define VMIDMT_NSVMIDMTCR0_RMSK 0x00000001 788 #define VMIDMT_NSVMIDMTCR0_SHFT 0 789 #define VMIDMT_NSVMIDMTCR0_IN(b) \ 790 in_dword_masked(VMIDMT_NSVMIDMTCR0_ADDR(b), VMIDMT_NSVMIDMTCR0_RMSK) 791 #define VMIDMT_NSVMIDMTCR0_INM(b, m) \ 792 in_dword_masked(VMIDMT_NSVMIDMTCR0_ADDR(b), (m)) 793 #define VMIDMT_NSVMIDMTCR0_OUT(b, v) \ 794 mmio_write_32(VMIDMT_NSVMIDMTCR0_ADDR(b), (v)) 795 #define VMIDMT_NSVMIDMTCR0_OUTM(b, m, v) \ 796 out_dword_masked_ns(VMIDMT_NSVMIDMTCR0_ADDR(b), (m), (v), \ 797 VMIDMT_NSVMIDMTCR0_IN(b)) 798 799 #define VMIDMT_NSVMIDMTCR0_CLKONOFFE_BMSK 0x00000001 800 #define VMIDMT_NSVMIDMTCR0_CLKONOFFE_SHFT 0x00 801 802 #define VMIDMT_VMIDMTACR_ADDR(b) (b + 0x0000009c) 803 #define VMIDMT_VMIDMTACR_PHYS(b) (b + 0x0000009c) 804 #define VMIDMT_VMIDMTACR_RMSK 0xffffffff 805 #define VMIDMT_VMIDMTACR_SHFT 0 806 #define VMIDMT_VMIDMTACR_IN(b) \ 807 in_dword_masked(VMIDMT_VMIDMTACR_ADDR(b), VMIDMT_VMIDMTACR_RMSK) 808 #define VMIDMT_VMIDMTACR_INM(b, m) \ 809 in_dword_masked(VMIDMT_VMIDMTACR_ADDR(b), (m)) 810 #define VMIDMT_VMIDMTACR_OUT(b, v) mmio_write_32(VMIDMT_VMIDMTACR_ADDR(b), (v)) 811 #define VMIDMT_VMIDMTACR_OUTM(b, m, v) \ 812 out_dword_masked_ns(VMIDMT_VMIDMTACR_ADDR(b), (m), (v), \ 813 VMIDMT_VMIDMTACR_IN(b)) 814 815 #define VMIDMT_VMIDMTACR_VMID_BMSK 0xffffffff 816 #define VMIDMT_VMIDMTACR_VMID_SHFT 0x00 817 818 #define VMIDMT_MSD0_ADDR(b) (b + 0x00000480) 819 #define VMIDMT_MSD0_PHYS(b) (b + 0x00000480) 820 #define VMIDMT_MSD0_RMSK 0xffffffff 821 #define VMIDMT_MSD0_SHFT 0 822 #define VMIDMT_MSD0_IN(b) in_dword_masked(VMIDMT_MSD0_ADDR(b), VMIDMT_MSD0_RMSK) 823 #define VMIDMT_MSD0_INM(b, m) in_dword_masked(VMIDMT_MSD0_ADDR(b), (m)) 824 #define VMIDMT_MSD0_OUT(b, v) mmio_write_32(VMIDMT_MSD0_ADDR(b), (v)) 825 #define VMIDMT_MSD0_OUTM(b, m, v) \ 826 out_dword_masked_ns(VMIDMT_MSD0_ADDR(b), (m), (v), VMIDMT_MSD0_IN(b)) 827 828 #define VMIDMT_MSD0_MSA_STATE_BMSK 0xffffffff 829 #define VMIDMT_MSD0_MSA_STATE_SHFT 0x00 830 831 #define VMIDMT_MSD1_ADDR(b) (b + 0x00000484) 832 #define VMIDMT_MSD1_PHYS(b) (b + 0x00000484) 833 #define VMIDMT_MSD1_RMSK 0xffffffff 834 #define VMIDMT_MSD1_SHFT 0 835 #define VMIDMT_MSD1_IN(b) in_dword_masked(VMIDMT_MSD1_ADDR(b), VMIDMT_MSD1_RMSK) 836 #define VMIDMT_MSD1_INM(b, m) in_dword_masked(VMIDMT_MSD1_ADDR(b), (m)) 837 #define VMIDMT_MSD1_OUT(b, v) mmio_write_32(VMIDMT_MSD1_ADDR(b), (v)) 838 #define VMIDMT_MSD1_OUTM(b, m, v) \ 839 out_dword_masked_ns(VMIDMT_MSD1_ADDR(b), (m), (v), VMIDMT_MSD1_IN(b)) 840 841 #define VMIDMT_MSD1_MSA_STATE_BMSK 0xffffffff 842 #define VMIDMT_MSD1_MSA_STATE_SHFT 0x00 843 844 #define VMIDMT_MSD2_ADDR(b) (b + 0x00000488) 845 #define VMIDMT_MSD2_PHYS(b) (b + 0x00000488) 846 #define VMIDMT_MSD2_RMSK 0xffffffff 847 #define VMIDMT_MSD2_SHFT 0 848 #define VMIDMT_MSD2_IN(b) in_dword_masked(VMIDMT_MSD2_ADDR(b), VMIDMT_MSD2_RMSK) 849 #define VMIDMT_MSD2_INM(b, m) in_dword_masked(VMIDMT_MSD2_ADDR(b), (m)) 850 #define VMIDMT_MSD2_OUT(b, v) mmio_write_32(VMIDMT_MSD2_ADDR(b), (v)) 851 #define VMIDMT_MSD2_OUTM(b, m, v) \ 852 out_dword_masked_ns(VMIDMT_MSD2_ADDR(b), (m), (v), VMIDMT_MSD2_IN(b)) 853 854 #define VMIDMT_MSD2_MSA_STATE_BMSK 0xffffffff 855 #define VMIDMT_MSD2_MSA_STATE_SHFT 0x00 856 857 #define VMIDMT_MSD3_ADDR(b) (b + 0x0000048c) 858 #define VMIDMT_MSD3_PHYS(b) (b + 0x0000048c) 859 #define VMIDMT_MSD3_RMSK 0xffffffff 860 #define VMIDMT_MSD3_SHFT 0 861 #define VMIDMT_MSD3_IN(b) in_dword_masked(VMIDMT_MSD3_ADDR(b), VMIDMT_MSD3_RMSK) 862 #define VMIDMT_MSD3_INM(b, m) in_dword_masked(VMIDMT_MSD3_ADDR(b), (m)) 863 #define VMIDMT_MSD3_OUT(b, v) mmio_write_32(VMIDMT_MSD3_ADDR(b), (v)) 864 #define VMIDMT_MSD3_OUTM(b, m, v) \ 865 out_dword_masked_ns(VMIDMT_MSD3_ADDR(b), (m), (v), VMIDMT_MSD3_IN(b)) 866 867 #define VMIDMT_MSD3_MSA_STATE_BMSK 0xffffffff 868 #define VMIDMT_MSD3_MSA_STATE_SHFT 0x00 869 870 #define VMIDMT_MCR_ADDR(b) (b + 0x00000494) 871 #define VMIDMT_MCR_PHYS(b) (b + 0x00000494) 872 #define VMIDMT_MCR_RMSK 0x00000007 873 #define VMIDMT_MCR_SHFT 0 874 #define VMIDMT_MCR_IN(b) in_dword_masked(VMIDMT_MCR_ADDR(b), VMIDMT_MCR_RMSK) 875 #define VMIDMT_MCR_INM(b, m) in_dword_masked(VMIDMT_MCR_ADDR(b), (m)) 876 #define VMIDMT_MCR_OUT(b, v) mmio_write_32(VMIDMT_MCR_ADDR(b), (v)) 877 #define VMIDMT_MCR_OUTM(b, m, v) \ 878 out_dword_masked_ns(VMIDMT_MCR_ADDR(b), (m), (v), VMIDMT_MCR_IN(b)) 879 880 #define VMIDMT_MCR_CLKONOFFE_BMSK 0x00000004 881 #define VMIDMT_MCR_CLKONOFFE_SHFT 0x02 882 #define VMIDMT_MCR_BPMSACFG_BMSK 0x00000002 883 #define VMIDMT_MCR_BPMSACFG_SHFT 0x01 884 #define VMIDMT_MCR_BPSMSACFG_BMSK 0x00000001 885 #define VMIDMT_MCR_BPSMSACFG_SHFT 0x00 886 887 #define VMIDMT_SMRn_ADDR(b, n) (b + 0x00000800 + 4 * (n)) 888 #define VMIDMT_SMRn_PHYS(b, n) (b + 0x00000800 + 4 * (n)) 889 #define VMIDMT_SMRn_RMSK 0xffffffff 890 #define VMIDMT_SMRn_SHFT 0 891 #define VMIDMT_SMRn_INI(b, n) mmio_read_32(VMIDMT_SMRn_ADDR(b, (n))) 892 #define VMIDMT_SMRn_INMI(b, n, mask) \ 893 in_dword_masked(VMIDMT_SMRn_ADDR(b, (n)), (mask)) 894 #define VMIDMT_SMRn_OUTI(b, n, val) \ 895 mmio_write_32(VMIDMT_SMRn_ADDR(b, (n)), (val)) 896 #define VMIDMT_SMRn_OUTMI(b, n, mask, val) \ 897 out_dword_masked_ns(VMIDMT_SMRn_ADDR(b, (n)), (mask), (val), \ 898 VMIDMT_SMRn_INI(b, (n))) 899 900 #define VMIDMT_SMRn_VALID_BMSK 0x80000000 901 #define VMIDMT_SMRn_VALID_SHFT 0x1f 902 #define VMIDMT_SMRn_MASK_BMSK 0x7fff0000 903 #define VMIDMT_SMRn_MASK_SHFT 0x10 904 #define VMIDMT_SMRn_ID_BMSK 0x00007fff 905 #define VMIDMT_SMRn_ID_SHFT 0x00 906 907 #define VMIDMT_S2VRn_ADDR(b, n) (b + 0x00000c00 + 4 * (n)) 908 #define VMIDMT_S2VRn_PHYS(b, n) (b + 0x00000c00 + 4 * (n)) 909 #define VMIDMT_S2VRn_RMSK 0x30fcfbff 910 #define VMIDMT_S2VRn_SHFT 0 911 #define VMIDMT_S2VRn_INI(b, n) mmio_read_32(VMIDMT_S2VRn_ADDR(b, (n))) 912 #define VMIDMT_S2VRn_INMI(b, n, mask) \ 913 in_dword_masked(VMIDMT_S2VRn_ADDR(b, (n)), (mask)) 914 #define VMIDMT_S2VRn_OUTI(b, n, val) \ 915 mmio_write_32(VMIDMT_S2VRn_ADDR(b, (n)), (val)) 916 #define VMIDMT_S2VRn_OUTMI(b, n, mask, val) \ 917 out_dword_masked_ns(VMIDMT_S2VRn_ADDR(b, (n)), (mask), (val), \ 918 VMIDMT_S2VRn_INI(b, (n))) 919 920 #define VMIDMT_S2VRn_TRANSIENTCFG_BMSK 0x30000000 921 #define VMIDMT_S2VRn_TRANSIENTCFG_SHFT 0x1c 922 #define VMIDMT_S2VRn_WACFG_BMSK 0x00c00000 923 #define VMIDMT_S2VRn_WACFG_SHFT 0x16 924 #define VMIDMT_S2VRn_RACFG_BMSK 0x00300000 925 #define VMIDMT_S2VRn_RACFG_SHFT 0x14 926 #define VMIDMT_S2VRn_NSCFG_BMSK 0x000c0000 927 #define VMIDMT_S2VRn_NSCFG_SHFT 0x12 928 #define VMIDMT_S2VRn_TYPE_BMSK 0x00030000 929 #define VMIDMT_S2VRn_TYPE_SHFT 0x10 930 #define VMIDMT_S2VRn_MEMATTR_BMSK 0x0000f000 931 #define VMIDMT_S2VRn_MEMATTR_SHFT 0x0c 932 #define VMIDMT_S2VRn_MTCFG_BMSK 0x00000800 933 #define VMIDMT_S2VRn_MTCFG_SHFT 0x0b 934 #define VMIDMT_S2VRn_SHCFG_BMSK 0x00000300 935 #define VMIDMT_S2VRn_SHCFG_SHFT 0x08 936 #define VMIDMT_S2VRn_VMID_BMSK 0x000000ff 937 #define VMIDMT_S2VRn_VMID_SHFT 0x00 938 939 #define VMIDMT_AS2VRn_ADDR(b, n) (b + 0x00000e00 + 4 * (n)) 940 #define VMIDMT_AS2VRn_PHYS(b, n) (b + 0x00000e00 + 4 * (n)) 941 #define VMIDMT_AS2VRn_RMSK 0x70000013 942 #define VMIDMT_AS2VRn_SHFT 0 943 #define VMIDMT_AS2VRn_INI(b, n) mmio_read_32(VMIDMT_AS2VRn_ADDR(b, (n))) 944 #define VMIDMT_AS2VRn_INMI(b, n, mask) \ 945 in_dword_masked(VMIDMT_AS2VRn_ADDR(b, (n)), (mask)) 946 #define VMIDMT_AS2VRn_OUTI(b, n, val) \ 947 mmio_write_32(VMIDMT_AS2VRn_ADDR(b, (n)), (val)) 948 #define VMIDMT_AS2VRn_OUTMI(b, n, mask, val) \ 949 out_dword_masked_ns(VMIDMT_AS2VRn_ADDR(b, (n)), (mask), (val), \ 950 VMIDMT_AS2VRn_INI(b, (n))) 951 952 #define VMIDMT_AS2VRn_RCNSH_BMSK 0x40000000 953 #define VMIDMT_AS2VRn_RCNSH_SHFT 0x1e 954 #define VMIDMT_AS2VRn_RCISH_BMSK 0x20000000 955 #define VMIDMT_AS2VRn_RCISH_SHFT 0x1d 956 #define VMIDMT_AS2VRn_RCOSH_BMSK 0x10000000 957 #define VMIDMT_AS2VRn_RCOSH_SHFT 0x1c 958 #define VMIDMT_AS2VRn_REQPRIORITYCFG_BMSK 0x00000010 959 #define VMIDMT_AS2VRn_REQPRIORITYCFG_SHFT 0x04 960 #define VMIDMT_AS2VRn_REQPRIORITY_BMSK 0x00000003 961 #define VMIDMT_AS2VRn_REQPRIORITY_SHFT 0x00 962 963 #define VMIDMT_IN(base, regsym) __vmidmthwio_in(base, regsym) 964 #define VMIDMT_INI(base, regsym, index) __vmidmthwio_ini(base, regsym, index) 965 #define VMIDMT_INM(base, regsym, mask) __vmidmthwio_inm(base, regsym, mask) 966 #define VMIDMT_INMI(base, regsym, index, mask) \ 967 __vmidmthwio_inmi(base, regsym, index, mask) 968 #define VMIDMT_OUT(base, regsym, val) __vmidmthwio_out(base, regsym, val) 969 #define VMIDMT_OUTI(base, regsym, index, val) \ 970 __vmidmthwio_outi(base, regsym, index, val) 971 #define VMIDMT_OUTM(base, regsym, mask, val) \ 972 __vmidmthwio_outm(base, regsym, mask, val) 973 #define VMIDMT_OUTMI(base, regsym, index, mask, val) \ 974 __vmidmthwio_outmi(base, regsym, index, mask, val) 975 #define VMIDMT_ADDR(base, regsym) __vmidmthwio_addr(base, regsym) 976 #define VMIDMT_ADDRI(base, regsym, index) \ 977 __vmidmthwio_addri(base, regsym, index) 978 #define VMIDMT_RMSK(regsym) __vmidmthwio_rmsk(regsym) 979 #define VMIDMT_RSHFT(regsym) __vmidmthwio_rshft(regsym) 980 #define VMIDMT_SHFT(regsym, fldsym) __vmidmthwio_shft(regsym, fldsym) 981 #define VMIDMT_FMSK(regsym, fldsym) __vmidmthwio_fmsk(regsym, fldsym) 982 #define VMIDMT_INFI(base, regsym, index, field) \ 983 (VMIDMT_INMI(base, regsym, index, VMIDMT_FMSK(regsym, field)) >> \ 984 VMIDMT_SHFT(regsym, field)) 985 #define VMIDMT_OUTF(base, regsym, field, val) \ 986 VMIDMT_OUTM(base, regsym, VMIDMT_FMSK(regsym, field), \ 987 (val) << VMIDMT_SHFT(regsym, field)) 988 #define VMIDMT_INF(base, regsym, field) \ 989 (VMIDMT_INM(base, regsym, VMIDMT_FMSK(regsym, field)) >> \ 990 VMIDMT_SHFT(regsym, field)) 991 #define VMIDMT_OUTFI(base, regsym, index, field, val) \ 992 VMIDMT_OUTMI(base, regsym, index, VMIDMT_FMSK(regsym, field), \ 993 (val) << VMIDMT_SHFT(regsym, field)) 994 #define VMIDMT_INFC(regval, regsym, field) \ 995 (((regval) & VMIDMT_FMSK(regsym, field)) >> VMIDMT_SHFT(regsym, field)) 996 #define __vmidmthwio_in(base, regsym) VMIDMT_##regsym##_IN(base) 997 #define __vmidmthwio_ini(base, regsym, index) VMIDMT_##regsym##_INI(base, index) 998 #define __vmidmthwio_inm(base, regsym, mask) VMIDMT_##regsym##_INM(base, mask) 999 #define __vmidmthwio_inmi(base, regsym, index, mask) \ 1000 VMIDMT_##regsym##_INMI(base, index, mask) 1001 #define __vmidmthwio_out(base, regsym, val) VMIDMT_##regsym##_OUT(base, val) 1002 #define __vmidmthwio_outi(base, regsym, index, val) \ 1003 VMIDMT_##regsym##_OUTI(base, index, val) 1004 #define __vmidmthwio_outm(base, regsym, mask, val) \ 1005 VMIDMT_##regsym##_OUTM(base, mask, val) 1006 #define __vmidmthwio_outmi(base, regsym, index, mask, val) \ 1007 VMIDMT_##regsym##_OUTMI(base, index, mask, val) 1008 #define __vmidmthwio_addr(base, regsym) VMIDMT_##regsym##_ADDR(base) 1009 #define __vmidmthwio_addri(base, regsym, index) \ 1010 VMIDMT_##regsym##_ADDR(base, index) 1011 #define __vmidmthwio_rmsk(regsym) VMIDMT_##regsym##_RMSK 1012 #define __vmidmthwio_fmsk(regsym, fldsym) VMIDMT_##regsym##_##fldsym##_BMSK 1013 #define __vmidmthwio_rshft(regsym) VMIDMT_##regsym##_SHFT 1014 #define __vmidmthwio_shft(regsym, fldsym) VMIDMT_##regsym##_##fldsym##_SHFT 1015 1016 #endif /* VMIDMT_HAL_HWIO_H */ 1017