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Searched refs:SECURE_CRU_BASE (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/
H A Dpmu.c338 mmio_write_32(SECURE_CRU_BASE + SECURE_CRU_CLKGATE_CON(i), 0xffff0000); in clk_gate_con_disable()
341 mmio_write_32(SECURE_CRU_BASE + SECURE_SCRU_CLKGATE_CON(i), 0xffff0000); in clk_gate_con_disable()
361 clk_save[j] = mmio_read_32(SECURE_CRU_BASE + SECURE_CRU_CLKGATE_CON(i)); in clk_gate_con_save()
364 clk_save[j] = mmio_read_32(SECURE_CRU_BASE + SECURE_SCRU_CLKGATE_CON(i)); in clk_gate_con_save()
386 mmio_write_32(SECURE_CRU_BASE + SECURE_CRU_CLKGATE_CON(i), in clk_gate_con_restore()
390 mmio_write_32(SECURE_CRU_BASE + SECURE_SCRU_CLKGATE_CON(i), in clk_gate_con_restore()
894 ddr_data.secure_cru_mode = mmio_read_32(SECURE_CRU_BASE + 0x4280); in pm_pll_suspend()
898 mmio_write_32(SECURE_CRU_BASE + 0x4280, 0x00030000); in pm_pll_suspend()
908 mmio_write_32(SECURE_CRU_BASE + 0x4280, in pm_pll_restore()
/rk3399_ARM-atf/plat/rockchip/rk3576/
H A Drk3576_def.h60 #define SECURE_CRU_BASE 0x27210000 macro
/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/soc/
H A Dsoc.h98 #define CRU_AUTOCS_SEC_CON(offset) (SECURE_CRU_BASE + (offset))