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Searched refs:PMU1_DDR_PWR_CON (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/
H A Dpmu.c757 mmio_write_32(PMU_BASE + PMU1_DDR_PWR_CON(0), WITH_16BITS_WMSK(pmu1_ddr_pwr_con)); in pmu_sleep_config()
758 mmio_write_32(PMU_BASE + PMU1_DDR_PWR_CON(1), WITH_16BITS_WMSK(pmu1_ddr_pwr_con)); in pmu_sleep_config()
803 mmio_write_32(PMU_BASE + PMU1_DDR_PWR_CON(0), 0xffff0000); in pmu_sleep_restore()
804 mmio_write_32(PMU_BASE + PMU1_DDR_PWR_CON(1), 0xffff0000); in pmu_sleep_restore()
H A Dpmu.h34 #define PMU1_DDR_PWR_CON(i) (PMU1_OFFSET + 0x0100 + (i) * 4) macro
/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/pmu/
H A Dpmu.h30 #define PMU1_DDR_PWR_CON(i) (0x4020 + (i) * 4) macro
H A Dpmu.c1149 mmio_write_32(PMU_BASE + PMU1_DDR_PWR_CON(i), in pmu_sleep_config()