Searched refs:NPUGRF_BASE (Results 1 – 3 of 3) sorted by relevance
42 #define NPUGRF_BASE 0xfd5a2000 macro
41 #define NPUGRF_BASE 0x26018000 macro
1028 return (mmio_read_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_STATUS) & 0x3FFF) * MHz; in clk_scmi_npu_get_rate()1067 mmio_write_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_CON2, in clk_npu_set_rate()1070 mmio_write_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_CON0_L, in clk_npu_set_rate()1073 mmio_write_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_CON0_H, in clk_npu_set_rate()1076 mmio_write_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_CON1, in clk_npu_set_rate()1079 mmio_write_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_CON0_L, in clk_npu_set_rate()1082 mmio_write_32(NPUGRF_BASE + RK3588_NPU_PVTPLL_CON0_L, in clk_npu_set_rate()