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Searched refs:MMU_INT_CONTROL0 (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/iommu/
H A Dmtk_iommu_smc.c27 #define MMU_INT_CONTROL0 (0x120) macro
159 mmio_setbits_32(mmu_cfg->base + MMU_INT_CONTROL0, INT_CLR); in mtk_secure_iommu_fault_report()