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Searched refs:MMU_DEV_PCIE_0 (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/iommu/mt8189/
H A Dmtk_iommu_plat.c29 #define MMU_DEV_PCIE_0 (0) macro
55 [MMU_DEV_PCIE_0] = IFR_MST_CFG_ENTRY(0, 0),
/rk3399_ARM-atf/plat/mediatek/drivers/iommu/mt8188/
H A Dmtk_iommu_plat.c42 #define MMU_DEV_PCIE_0 (0) macro
84 [MMU_DEV_PCIE_0] = IFR_MST_CFG_ENTRY(0, 18),