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Searched refs:MD32PCM_CFGREG_SW_RSTN (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_internal.c111 if (mmio_read_32(MD32PCM_CFGREG_SW_RSTN) & 0x1) in __spm_reset_and_init_pcm()
661 con0 = mmio_read_32(MD32PCM_CFGREG_SW_RSTN); in __spm_kick_pcm_to_run()
662 mmio_write_32(MD32PCM_CFGREG_SW_RSTN, con0 | 0x1); in __spm_kick_pcm_to_run()
H A Dmt_spm_internal.h39 #define MD32PCM_CFGREG_SW_RSTN (MD32PCM_BASE + 0x0000) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_internal.h91 #define MD32PCM_CFGREG_SW_RSTN (MD32PCM_BASE + 0x0000) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_internal.h30 #define MD32PCM_CFGREG_SW_RSTN (MD32PCM_BASE + 0x0000) macro