Searched refs:GPUGRF_BASE (Results 1 – 3 of 3) sorted by relevance
41 #define GPUGRF_BASE 0xfd5a0000 macro
40 #define GPUGRF_BASE 0x26016000 macro
929 return (mmio_read_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_STATUS) & 0x3FFF) * MHz; in clk_scmi_gpu_get_rate()967 mmio_write_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_CON2, in clk_gpu_set_rate()970 mmio_write_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_CON0_L, in clk_gpu_set_rate()973 mmio_write_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_CON0_H, in clk_gpu_set_rate()976 mmio_write_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_CON1, in clk_gpu_set_rate()979 mmio_write_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_CON0_L, in clk_gpu_set_rate()982 mmio_write_32(GPUGRF_BASE + RK3588_GPU_PVTPLL_CON0_L, in clk_gpu_set_rate()