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Searched refs:GICR_ICPENDR0 (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/include/drivers/arm/
H A Dgicv3.h175 #define GICR_ICPENDR0 (GICR_SGIBASE_OFFSET + U(0x280)) macro
188 #define GICR_ICPENDR GICR_ICPENDR0
/rk3399_ARM-atf/plat/mediatek/drivers/gic600/
H A Dmt_gic_v3.c209 mmio_write_32(gicr_base + GICR_ICPENDR0, SGI_MASK); in gic_sgi_restore_all()
/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgicv3_private.h439 mmio_write_32(base + GICR_ICPENDR0, val); in gicr_write_icpendr0()