Searched refs:FW_MPU_DDR_SCR_WRITEL (Results 1 – 1 of 1) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_ddr.c | 72 #define FW_MPU_DDR_SCR_WRITEL(data, reg) \ macro
219 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
222 FW_MPU_DDR_SCR_WRITEL(upper & 0xff, in sdram_set_firewall_non_f2sdram()
227 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
230 FW_MPU_DDR_SCR_WRITEL(upper & 0xff, in sdram_set_firewall_non_f2sdram()
240 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
243 FW_MPU_DDR_SCR_WRITEL(upper & 0xff, in sdram_set_firewall_non_f2sdram()
248 FW_MPU_DDR_SCR_WRITEL(lower, in sdram_set_firewall_non_f2sdram()
251 FW_MPU_DDR_SCR_WRITEL(upper & 0xff, in sdram_set_firewall_non_f2sdram()
255 FW_MPU_DDR_SCR_WRITEL(BIT(i) | BIT(i + 8), in sdram_set_firewall_non_f2sdram()
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