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Searched refs:FW_MPU_DDR_SCR_EN_SET (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_ddr.c48 #define FW_MPU_DDR_SCR_EN_SET 0x04 macro
256 FW_MPU_DDR_SCR_EN_SET); in sdram_set_firewall_non_f2sdram()