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Searched refs:FW_F2SDRAM_DDR_SCR_REGION0ADDR_LIMIT (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_ddr.c69 #define FW_F2SDRAM_DDR_SCR_REGION0ADDR_LIMIT 0x18 macro
295 FW_F2SDRAM_DDR_SCR_REGION0ADDR_LIMIT + in sdram_set_firewall_f2sdram()