Searched refs:FSPI_MCR0 (Results 1 – 2 of 2) sorted by relevance
51 ui_reg = fspi_readl(FSPI_MCR0); in fspi_MDIS()58 fspi_writel(FSPI_MCR0, ui_reg); in fspi_MDIS()198 reg = fspi_readl(FSPI_MCR0); in fspi_ahb_invalidate()200 fspi_writel(FSPI_MCR0, reg); in fspi_ahb_invalidate()201 while ((fspi_readl(FSPI_MCR0) & FSPI_MCR0_SWRST) != 0) in fspi_ahb_invalidate()737 VERBOSE("Flexspi: Register FSPI_MCR0(0x%x) = 0x%08x\n", FSPI_MCR0, fspi_readl(FSPI_MCR0)); in fspi_dump_regs()771 INFO("Flexspi: Default MCR0 = 0x%08x, before reset\n", fspi_readl(FSPI_MCR0)); in fspi_init()775 fspi_writel(FSPI_MCR0, FSPI_MCR0_SWRST); in fspi_init()776 while ((fspi_readl(FSPI_MCR0) & FSPI_MCR0_SWRST)) in fspi_init()787 mcrx = fspi_readl(FSPI_MCR0); in fspi_init()[all …]
152 #define FSPI_MCR0 0x0ul macro