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Searched refs:DVFSRC_TARGET_LEVEL_1 (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_vcorefs_reg.h183 #define DVFSRC_TARGET_LEVEL_1 (DVFSRC_BASE + 0x5CC) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_vcorefs_reg.h330 #define DVFSRC_TARGET_LEVEL_1 (DVFSRC_BASE + 0x5CC) macro