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Searched refs:DVFSRC_RSRV_5 (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_vcorefs.h68 #define DVFSRC_RSRV_5 (DVFSRC_BASE + 0x614) macro
H A Dmt_spm_vcorefs.c86 { DVFSRC_RSRV_5, 0x00000001 },
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_vcorefs_reg.h117 #define DVFSRC_RSRV_5 (DVFSRC_BASE + 0x294) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_vcorefs.c275 {DVFSRC_RSRV_5, 0x00000001},
H A Dmt_spm_vcorefs.h190 #define DVFSRC_RSRV_5 (DVFSRC_BASE + 0x614) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_vcorefs.h203 #define DVFSRC_RSRV_5 (DVFSRC_BASE + 0x614) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_vcorefs_reg.h135 #define DVFSRC_RSRV_5 (DVFSRC_BASE + 0x294) macro