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Searched refs:DVFSRC_HALT_SW_CONTROL (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_vcorefs.h105 #define DVFSRC_HALT_SW_CONTROL (DVFSRC_BASE + 0xC0) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_vcorefs.h116 #define DVFSRC_HALT_SW_CONTROL (DVFSRC_BASE + 0xC0) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_vcorefs_reg.h46 #define DVFSRC_HALT_SW_CONTROL (DVFSRC_BASE + 0xC4) macro