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Searched refs:DVFSRC_95MD_SCEN_BW1 (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_vcorefs_reg.h103 #define DVFSRC_95MD_SCEN_BW1 (DVFSRC_BASE + 0x25C) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_vcorefs.h176 #define DVFSRC_95MD_SCEN_BW1 (DVFSRC_BASE + 0x528) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_vcorefs.h189 #define DVFSRC_95MD_SCEN_BW1 (DVFSRC_BASE + 0x528) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_vcorefs_reg.h121 #define DVFSRC_95MD_SCEN_BW1 (DVFSRC_BASE + 0x25C) macro