Searched refs:DENALI_CTL_143 (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/plat/imx/imx8ulp/ |
| H A D | dram.c | 28 #define DENALI_CTL_143 U(0x23C) macro
223 dram_ctl_143 = mmio_read_32(IMX_DDRC_BASE + DENALI_CTL_143); in dram_lp_auto_disable()
231 mmio_setbits_32(IMX_DDRC_BASE + DENALI_CTL_143, 0xF << 24); in dram_lp_auto_disable()
271 mmio_write_32(IMX_DDRC_BASE + DENALI_CTL_143, dram_ctl_143); in dram_lp_auto_enable()
|
| /rk3399_ARM-atf/plat/renesas/rza/soc/rza3m/drivers/ddr/ |
| H A D | param_mc_C-011_D3-01-1.c | 85 { DENALI_CTL_142, 0x00000000 }, { DENALI_CTL_143, 0x00000000 },
|
| H A D | param_mc_C-011_D3-02-1.c | 85 { DENALI_CTL_142, 0x00000000 }, { DENALI_CTL_143, 0x00000000 },
|
| /rk3399_ARM-atf/plat/renesas/rza/soc/rza3m/include/ |
| H A D | ddr_mc_regs.h | 176 #define DENALI_CTL_143 0x023C macro
|