Searched refs:DDRPHY_R42 (Results 1 – 2 of 2) sorted by relevance
56 #define DDRPHY_R42 0x160 macro
63 while ((read_phy_reg(DDRPHY_R42) & 0x00000003) != sl_lanes) in ddr_setup()945 while ((read_phy_reg(DDRPHY_R42) & 0x3) != sl_lanes) in opt_delay()