Searched refs:DDRPHY_R27 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/drivers/renesas/rza/ddr/ |
| H A D | ddr.c | 375 write_phy_reg(DDRPHY_R27, 0xAC001000); in program_phy1()
412 write_phy_reg(DDRPHY_R27, 26 | (0x10 << 8) | 0xAC000000); in program_phy1()
470 rmw_phy_reg(DDRPHY_R27, 0xFBFFFFFF, 0x00000000); in program_phy1()
875 rmw_phy_reg(DDRPHY_R27, 0xFBFFFFFF, 0x04000000); in opt_delay()
925 rmw_phy_reg(DDRPHY_R27, 0xFFFFFF80, tmp); in opt_delay()
944 rmw_phy_reg(DDRPHY_R27, 0xFBFFFFFF, 0x00000000); in opt_delay()
1011 rmw_phy_reg(DDRPHY_R27, 0xFBFFFFFF, 0x04000000); in program_phy2()
1012 rmw_phy_reg(DDRPHY_R27, 0xFC0000FF, MIN(tmp, 0x3FFFFU) << 8); in program_phy2()
1013 rmw_phy_reg(DDRPHY_R27, 0xFBFFFFFF, 0x00000000); in program_phy2()
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| /rk3399_ARM-atf/plat/renesas/rza/soc/rza3m/include/ |
| H A D | ddr_phy_regs.h | 41 #define DDRPHY_R27 0x124 macro
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