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Searched refs:DDRC_SWCTL (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx8m/ddr/
H A Ddram_retention.c80 mmio_write_32(DDRC_SWCTL(0), 0x0); in dram_enter_retention()
94 mmio_write_32(DDRC_SWCTL(0), 0x1); in dram_enter_retention()
165 mmio_write_32(DDRC_SWCTL(0), 0x0); in dram_exit_retention()
189 mmio_write_32(DDRC_SWCTL(0), 0x0); in dram_exit_retention()
202 mmio_write_32(DDRC_SWCTL(0), 0x1); in dram_exit_retention()
H A Dddr4_dvfs.c99 mmio_write_32(DDRC_SWCTL(0), 0x0); in sw_pstate()
169 mmio_write_32(DDRC_SWCTL(0), 0x0); in ddr4_swffc()
257 mmio_write_32(DDRC_SWCTL(0), 0x1); in ddr4_swffc()
H A Dlpddr4_dvfs.c168 mmio_write_32(DDRC_SWCTL(0), 0x0000); in lpddr4_swffc()
251 mmio_write_32(DDRC_SWCTL(0), 0x1); in lpddr4_swffc()
/rk3399_ARM-atf/plat/imx/imx8m/include/
H A Dddrc.h146 #define DDRC_SWCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0x320) macro