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Searched refs:CSR_PLLCTRL3_ADDR (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/usercustom/
H A Dddrphy_phyinit_usercustom_saveretregs.c64 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_PLLCTRL3_ADDR); in ddrphy_phyinit_usercustom_saveretregs()
/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/
H A Dddrphy_phyinit_progcsrskiptrain.c805 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_PLLCTRL3_ADDR))),
/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/include/
H A Dddrphy_csr_all_cdefines.h234 #define CSR_PLLCTRL3_ADDR 0xCBU macro