Searched refs:CSR_PLLCTRL3_ADDR (Results 1 – 3 of 3) sorted by relevance
64 ret = ddrphy_phyinit_trackreg(TMASTER | CSR_PLLCTRL3_ADDR); in ddrphy_phyinit_usercustom_saveretregs()
805 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TMASTER | CSR_PLLCTRL3_ADDR))),
234 #define CSR_PLLCTRL3_ADDR 0xCBU macro