Searched refs:CSR_PHYINLP3_ADDR (Results 1 – 2 of 2) sorted by relevance
892 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (TINITENG | CSR_PHYINLP3_ADDR))), 0x0U);
602 #define CSR_PHYINLP3_ADDR 0x28U macro