Searched refs:CRU_PLLS_CON (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/soc/ |
| H A D | soc.h | 42 #define CRU_PLLS_CON(pll_id, i) (0x160 + (pll_id) * 0x20 + (i) * 0x4) macro
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| /rk3399_ARM-atf/plat/rockchip/rk3576/drivers/soc/ |
| H A D | soc.h | 32 #define CRU_PLLS_CON(pll_id, i) ((pll_id) * 0x20 + (i) * 0x4) macro
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| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/pmu/ |
| H A D | pmu.c | 1267 ddr_data.cpll_con0 = mmio_read_32(CRU_BASE + CRU_PLLS_CON(2, 0)); in pm_pll_suspend()
1273 mmio_write_32(CRU_BASE + CRU_PLLS_CON(2, 0), BITS_WITH_WMASK(1u, 1u, 15)); in pm_pll_suspend()
1278 pm_pll_wait_lock(CRU_BASE + CRU_PLLS_CON(2, 0)); in pm_pll_restore()
1282 mmio_write_32(CRU_BASE + CRU_PLLS_CON(2, 0), WITH_16BITS_WMSK(ddr_data.cpll_con0)); in pm_pll_restore()
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