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Searched refs:CRU_MODE_CON0 (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/soc/
H A Dsoc.h44 #define CRU_MODE_CON0 0x280 macro
/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/scmi/
H A Drk3588_clk.c464 mmio_write_32(BIGCORE0CRU_BASE + CRU_MODE_CON0, CPU_PLL_PATH_SLOWMODE); in clk_scmi_b0pll_disable()
633 mmio_write_32(BIGCORE1CRU_BASE + CRU_MODE_CON0, CPU_PLL_PATH_SLOWMODE); in clk_scmi_b1pll_disable()
832 mmio_write_32(DSUCRU_BASE + CRU_MODE_CON0, CPU_PLL_PATH_SLOWMODE); in clk_scmi_lpll_disable()
1715 src = mmio_read_32(BUSSCRU_BASE + CRU_MODE_CON0) & 0x3; in clk_scmi_spll_get_rate()
1737 mmio_write_32(BUSSCRU_BASE + CRU_MODE_CON0, in clk_scmi_spll_set_rate()
1742 mmio_write_32(BUSSCRU_BASE + CRU_MODE_CON0, in clk_scmi_spll_set_rate()