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Searched refs:CLK_DIVIDER_ALLOW_ZERO (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/
H A Dpm_api_clock.c142 CLK_DIVIDER_ALLOW_ZERO), \
156 CLK_DIVIDER_ALLOW_ZERO), \
170 CLK_DIVIDER_ALLOW_ZERO), \
355 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
402 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO |
413 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO |
453 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
465 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
529 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
542 .typeflags = (uint16_t)(CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO),
[all …]
H A Dpm_api_clock.h50 #define CLK_DIVIDER_ALLOW_ZERO BIT(2) macro
/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32-core.h123 #define CLK_DIVIDER_ALLOW_ZERO BIT(2) macro