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Searched refs:CLKDIV_4BITS_SHF0 (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3568/drivers/scmi/
H A Drk3568_clk.c35 #define CLKDIV_4BITS_SHF0(div) BITS_WITH_WMASK(div, 0xf, 0) macro
400 mmio_write_32(CRU_BASE + RK3568_CLK_SEL(2), CLKDIV_4BITS_SHF0(3)); in clk_cpu_set_rate()
432 CLKDIV_4BITS_SHF0(0)); in clk_cpu_set_rate()
439 CLKDIV_4BITS_SHF0(1)); in clk_cpu_set_rate()
494 mmio_write_32(CRU_BASE + RK3568_CLK_SEL(6), CLKDIV_4BITS_SHF0(5)); in clk_gpu_set_rate()
516 mmio_write_32(CRU_BASE + RK3568_CLK_SEL(6), CLKDIV_4BITS_SHF0((div - 1))); in clk_gpu_set_rate()
560 CLKDIV_2BITS_SHF4(2) | CLKDIV_4BITS_SHF0(5)); in clk_npu_set_rate()
583 CLKDIV_4BITS_SHF0((div - 1))); in clk_npu_set_rate()