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/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst1318 For C1-Ultra, the following errata build flags are defined :
1321 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is fixed
1325 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is
1329 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1333 C1-Ultra CPU. This needs to be enabled for revision r0p0 and is
1337 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1341 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1345 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
1349 C1-Ultra CPU. This needs to be enabled for revision r1p0 and is still
1353 C1-Ultra CPU. This needs to be enabled for revisions r0p0 and r1p0 and
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/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/
H A Dddrphy_phyinit_i_loadpieimage.c238 c_addr = byte * C1; in traininghwreg_program()
H A Dddrphy_phyinit_progcsrskiptrain.c642 c_addr = byte * C1;
H A Dddrphy_phyinit_c_initphyconfig.c874 c_addr = d * C1;
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-13.rst73 setting CPUACTLR6_EL1[41] = 1. For C1-Pro, the affected prefetcher is
/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/include/
H A Dddrphy_csr_all_cdefines.h6759 #define C1 0x1000U macro