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Searched refs:AGX_SOC_NOC_FW_DDR_SCR_ENABLESET (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_memory_controller.h130 #define AGX_SOC_NOC_FW_DDR_SCR_ENABLESET 0xf8020204 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_memory_controller.h130 #define AGX_SOC_NOC_FW_DDR_SCR_ENABLESET 0xf8020204 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_memory_controller.c369 mmio_write_32(AGX_SOC_NOC_FW_DDR_SCR_ENABLESET, BIT(0) | BIT(8)); in configure_hmc_adaptor_regs()
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_memory_controller.c368 mmio_write_32(AGX_SOC_NOC_FW_DDR_SCR_ENABLESET, BIT(0) | BIT(8)); in configure_hmc_adaptor_regs()