Searched refs:ACC_XPU_ERR_INT_REG_NUM (Results 1 – 4 of 4) sorted by relevance
14 #define ACC_XPU_ERR_INT_REG_NUM 2 macro79 xpu_err_pos_to_hal_map[ACC_XPU_ERR_INT_REG_NUM][ACC_XPU_ERR_NUM_PER_REG];82 xpu_non_sec_intr_status_reg[ACC_XPU_ERR_INT_REG_NUM];85 xpu_sec_intr_status_reg[ACC_XPU_ERR_INT_REG_NUM];88 xpu_non_sec_intr_en_reg[ACC_XPU_ERR_INT_REG_NUM];91 xpu_sec_intr_en_reg[ACC_XPU_ERR_INT_REG_NUM];
12 [ACC_XPU_ERR_INT_REG_NUM][ACC_XPU_ERR_NUM_PER_REG] = {43 xpu_non_sec_intr_status_reg[ACC_XPU_ERR_INT_REG_NUM] = {55 xpu_sec_intr_status_reg[ACC_XPU_ERR_INT_REG_NUM] = {67 xpu_non_sec_intr_en_reg[ACC_XPU_ERR_INT_REG_NUM] = {78 const struct xpu_intr_reg_dtls xpu_sec_intr_en_reg[ACC_XPU_ERR_INT_REG_NUM] = {
136 uint32_t err_bitmask[ACC_XPU_ERR_INT_REG_NUM] = { 0 }; in xpu_print_log()156 for (size_t i = 0; i < ACC_XPU_ERR_INT_REG_NUM; i++, p++) { in xpu_print_log()163 if (ACC_XPU_ERR_INT_REG_NUM == 1) { in xpu_print_log()170 for (size_t reg = 0; reg < ACC_XPU_ERR_INT_REG_NUM; reg++) { in xpu_print_log()
465 for (size_t i = 0; i < ACC_XPU_ERR_INT_REG_NUM; i++) { in enable_interrupts()