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Searched refs:pll_div_clk (Results 1 – 1 of 1) sorted by relevance

/optee_os/core/drivers/clk/sam/
H A Dsama7g5_clk.c1262 struct clk *pll_div_clk[PLL_ID_MAX] = { }; in pmc_setup_sama7g5() local
1388 pll_div_clk[i] = sama7g5_pmc->chws[p->eid].clk; in pmc_setup_sama7g5()
1393 parents[2] = pll_div_clk[PLL_ID_CPU]; in pmc_setup_sama7g5()
1394 parents[3] = pll_div_clk[PLL_ID_SYS]; in pmc_setup_sama7g5()
1479 parents[3] = pll_div_clk[PLL_ID_SYS]; in pmc_setup_sama7g5()
1480 parents[4] = pll_div_clk[PLL_ID_DDR]; in pmc_setup_sama7g5()
1481 parents[5] = pll_div_clk[PLL_ID_IMG]; in pmc_setup_sama7g5()
1482 parents[6] = pll_div_clk[PLL_ID_BAUD]; in pmc_setup_sama7g5()
1483 parents[7] = pll_div_clk[PLL_ID_AUDIO]; in pmc_setup_sama7g5()
1484 parents[8] = pll_div_clk[PLL_ID_ETH]; in pmc_setup_sama7g5()
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