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Searched refs:mideleg (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/arch/riscv/include/
H A Driscv.h309 unsigned long mideleg; in read_mideleg() local
311 asm volatile("csrr %0, mideleg" : "=r" (mideleg)); in read_mideleg()
313 return mideleg; in read_mideleg()
316 static inline __noprof void write_mideleg(unsigned long mideleg) in write_mideleg() argument
318 asm volatile("csrw mideleg, %0" : : "r" (mideleg)); in write_mideleg()
H A Dencoding.h4598 DECLARE_CSR(mideleg, CSR_MIDELEG)