Searched refs:io_caam_read32 (Results 1 – 10 of 10) sorted by relevance
22 uint32_t val = io_caam_read32(baseaddr + CCBVID); in caam_hal_ctrl_era()33 val = io_caam_read32(baseaddr + CHANUM_MS); in caam_hal_ctrl_jrnum()36 val = io_caam_read32(baseaddr + JR_VERSION); in caam_hal_ctrl_jrnum()49 val = io_caam_read32(baseaddr + CHANUM_LS); in caam_hal_ctrl_hash_limit()53 val = io_caam_read32(baseaddr + CHAVID_LS); in caam_hal_ctrl_hash_limit()62 val = io_caam_read32(baseaddr + MDHA_VERSION); in caam_hal_ctrl_hash_limit()79 uint32_t val = io_caam_read32(baseaddr + CTPR_LS); in caam_hal_ctrl_splitkey_support()90 val = io_caam_read32(baseaddr + CHANUM_LS); in caam_hal_ctrl_pknum()93 val = io_caam_read32(baseaddr + PKHA_VERSION); in caam_hal_ctrl_pknum()110 val = io_caam_read32(baseaddr + SCFGR); in caam_hal_ctrl_inc_priblob()[all …]
48 reg_val = io_caam_read32(baseaddr + JRX_JRINTR); in caam_hal_jr_reset()62 reg_val = io_caam_read32(baseaddr + JRX_JRCR); in caam_hal_jr_reset()121 return io_caam_read32(baseaddr + JRX_IRSAR); in caam_hal_jr_read_nbslot_available()131 return io_caam_read32(baseaddr + JRX_ORSFR); in caam_hal_jr_get_nbjob_done()160 val = io_caam_read32(baseaddr + JRX_JRINTR); in caam_hal_jr_check_ack_itr()183 val = io_caam_read32(baseaddr + JRX_IRSR); in caam_hal_jr_halt()185 (io_caam_read32(baseaddr + JRX_CSTA) != JRX_CSTA_BSY)) in caam_hal_jr_halt()191 val = io_caam_read32(baseaddr + JRX_JRINTR); in caam_hal_jr_halt()213 val = io_caam_read32(baseaddr + JRX_IRSR); in caam_hal_jr_flush()215 (io_caam_read32(baseaddr + JRX_CSTA) != JRX_CSTA_BSY)) in caam_hal_jr_flush()[all …]
23 vid = io_caam_read32(baseaddr + CHAVID_LS); in caam_hal_rng_instantiated()28 vid = io_caam_read32(baseaddr + RNG_VERSION); in caam_hal_rng_instantiated()50 reg = io_caam_read32(baseaddr + CTPR_MS); in caam_hal_rng_get_nb_sh()57 return io_caam_read32(baseaddr + RNG_STA) & (RNG_STA_IF1 | RNG_STA_IF0); in caam_hal_rng_get_sh_status()62 return io_caam_read32(baseaddr + RNG_STA) & RNG_STA_SKVN; in caam_hal_rng_key_loaded()75 return (io_caam_read32(baseaddr + RNG_STA) & bitmask) == bitmask; in caam_hal_rng_pr_enabled()103 val = io_caam_read32(baseaddr + TRNG_SDCTL); in caam_hal_rng_kick()142 val = io_caam_read32(baseaddr + TRNG_MCTL); in caam_hal_rng_kick()
46 status = io_caam_read32(jr_base + SM_SMCSR); in issue_cmd()49 return io_caam_read32(jr_base + SM_SMCSR); in issue_cmd()61 val = io_caam_read32(jr_base + SMVID_MS); in caam_hal_sm_check_page_partition()75 page_size = GET_SMVID_LS_PSIZ(io_caam_read32(jr_base + SMVID_LS)); in caam_hal_sm_get_pages_size()82 return SM_SMPO_OWNER(io_caam_read32(jr_base + SM_SMPO), partition) == in caam_hal_sm_prtn_is_free()88 return SM_SMPO_OWNER(io_caam_read32(jr_base + SM_SMPO), partition) == in caam_hal_sm_prtn_is_owned()
17 #define io_caam_read32(a) TEE_U32_FROM_BIG_ENDIAN(io_read32(a)) macro25 #define io_caam_read32(a) io_read32(a) macro
34 val = io_caam_read32(ctrl_base + JRxDID_MS(jr_idx)); in caam_hal_jr_setowner()63 val = io_caam_read32(ctrl_base + JRxDID_LS(jr_idx)); in caam_hal_jr_setowner()
33 val = io_caam_read32(ctrl_base + JRxDID_MS(jr_idx)); in caam_hal_jr_setowner()62 val = io_caam_read32(ctrl_base + JRxDID_LS(jr_idx)); in caam_hal_jr_setowner()
33 val = io_caam_read32(ctrl_base + JRxMIDR_MS(jr_idx)); in caam_hal_jr_setowner()66 val = io_caam_read32(ctrl_base + JRxMIDR_LS(jr_idx)); in caam_hal_jr_setowner()
22 val = io_caam_read32(ctrl_base + JRxMIDR_MS(jr_idx)); in caam_hal_jr_setowner()
74 io_caam_read32(elem->baseaddr + in do_save_regs()