Searched refs:_DIV_P (Results 1 – 1 of 1) sorted by relevance
| /optee_os/core/drivers/clk/ |
| H A D | clk-stm32mp15.c | 170 _DIV_P, enumerator
490 [_DIV_P] = RCC_PLLNCFGR2_DIVP_SHIFT,
752 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_P); in get_clock_rate()
757 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_P) >> in get_clock_rate()
782 clock = stm32mp1_read_pll_freq(_PLL2, _DIV_P); in get_clock_rate()
822 clock = stm32mp1_read_pll_freq(_PLL3, _DIV_P); in get_clock_rate()
894 clock = stm32mp1_read_pll_freq(_PLL1, _DIV_P); in get_clock_rate()
903 clock = stm32mp1_read_pll_freq(_PLL2, _DIV_P); in get_clock_rate()
912 clock = stm32mp1_read_pll_freq(_PLL3, _DIV_P); in get_clock_rate()
921 clock = stm32mp1_read_pll_freq(_PLL4, _DIV_P); in get_clock_rate()
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