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Searched refs:SEC_CONTROL_REG (Results 1 – 1 of 1) sorted by relevance

/optee_os/core/drivers/crypto/hisilicon/
H A Dsec_main.c24 #define SEC_CONTROL_REG 0x301200 macro
93 io_setbits32(qm->io_base + SEC_CONTROL_REG, SEC_CLK_GATE_ENABLE); in sec_enable_clock_gate()
107 io_clrbits32(qm->io_base + SEC_CONTROL_REG, SEC_CLK_GATE_ENABLE); in sec_engine_init()
118 io_setbits32(qm->io_base + SEC_CONTROL_REG, sec_dev->endian); in sec_engine_init()