Searched refs:SCFGR (Results 1 – 7 of 7) sorted by relevance
| /optee_os/core/drivers/crypto/caam/hal/common/ |
| H A D | hal_ctrl.c | 110 val = io_caam_read32(baseaddr + SCFGR); in caam_hal_ctrl_inc_priblob()
123 val = io_caam_read32(baseaddr + SCFGR); in caam_hal_ctrl_inc_priblob()
125 io_caam_write32(baseaddr + SCFGR, val); in caam_hal_ctrl_inc_priblob()
127 val = io_caam_read32(baseaddr + SCFGR); in caam_hal_ctrl_inc_priblob()
153 val_scfgr = io_caam_read32(ctrl_addr + SCFGR); in caam_hal_ctrl_get_mpcurve()
195 return io_caam_read32(ctrl_addr + SCFGR) & BM_SCFGR_MPMRL; in caam_hal_ctrl_is_mp_set()
250 io_caam_write32(ctrl_addr + SCFGR, in caam_hal_ctrl_fill_mpmr()
251 io_caam_read32(ctrl_addr + SCFGR) | in caam_hal_ctrl_fill_mpmr()
254 DMSG("val_scfgr = %#"PRIx32, io_caam_read32(ctrl_addr + SCFGR)); in caam_hal_ctrl_fill_mpmr()
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| /optee_os/core/drivers/crypto/caam/hal/imx_6_7/ |
| H A D | hal_ctrl.c | 19 BACKUP_REG(SCFGR, 1, BM_SCFGR_MPMRL | BM_SCFGR_MPCURVE, 0),
22 BACKUP_REG(SCFGR, 1, 0, 0),
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| /optee_os/core/drivers/crypto/caam/hal/imx_8q/registers/ |
| H A D | ctrl_regs.h | 27 #define SCFGR 0x000C macro
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| /optee_os/core/drivers/crypto/caam/hal/imx_8ulp/registers/ |
| H A D | ctrl_regs.h | 32 #define SCFGR 0x000C macro
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| /optee_os/core/drivers/crypto/caam/hal/imx_8m/registers/ |
| H A D | ctrl_regs.h | 32 #define SCFGR 0x000C macro
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| /optee_os/core/drivers/crypto/caam/hal/ls/registers/ |
| H A D | ctrl_regs.h | 38 #define SCFGR 0x000C macro
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| /optee_os/core/drivers/crypto/caam/hal/imx_6_7/registers/ |
| H A D | ctrl_regs.h | 47 #define SCFGR 0x000C macro
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