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Searched refs:FMSG (Results 1 – 25 of 40) sorted by relevance

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/optee_os/core/pta/stm32mp/
H A Dbsec_pta.c69 FMSG("Read shadow %"PRIu32" val: %#"PRIx32, otp_id, in bsec_read_mem()
78 FMSG("Read fuse %"PRIu32" val: %#"PRIx32, otp_id, *buf); in bsec_read_mem()
116 FMSG("Read lock %"PRIu32" val: %#"PRIx32, otp_id, *buf); in bsec_read_mem()
119 FMSG("%"PRIu32" invalid operation: %"PRIu32, otp_id, in bsec_read_mem()
128 FMSG("Buffer orig %p, size %zu", buf, size); in bsec_read_mem()
175 FMSG("Write shadow %"PRIx32" : %"PRIx32, in bsec_write_mem()
182 FMSG("Write fuse %"PRIx32" : %08"PRIx32, in bsec_write_mem()
189 FMSG("Perm lock access OTP: %u", otp_id); in bsec_write_mem()
196 FMSG("Shadow read lock"); in bsec_write_mem()
203 FMSG("Shadow write lock detected"); in bsec_write_mem()
[all …]
/optee_os/core/arch/arm/plat-stm32mp1/nsec-service/
H A Dbsec_svc.c30 FMSG("read shadow @%#"PRIx32, otp_id); in bsec_main()
34 FMSG("program @%#"PRIx32, otp_id); in bsec_main()
38 FMSG("write shadow @%#"PRIx32, otp_id); in bsec_main()
42 FMSG("read @%#"PRIx32, otp_id); in bsec_main()
52 FMSG("permanent write lock @%#"PRIx32, otp_id); in bsec_main()
/optee_os/lib/libutils/ext/include/
H A Dtrace.h74 #define FMSG(...) (void)0 macro
76 #define FMSG(...) trace_printf_helper(TRACE_FLOW, true, __VA_ARGS__) macro
80 #define INMSG(...) FMSG("> " __VA_ARGS__)
82 #define OUTMSG(...) FMSG("< " __VA_ARGS__)
/optee_os/core/arch/arm/plat-k3/drivers/
H A Dsec_proxy.c73 FMSG("Check for thread corruption"); in k3_sec_proxy_verify_thread()
90 FMSG("Check for thread direction"); in k3_sec_proxy_verify_thread()
102 FMSG("Check for thread queue"); in k3_sec_proxy_verify_thread()
115 FMSG("Success"); in k3_sec_proxy_verify_thread()
133 FMSG("Verifying the thread"); in ti_sci_transport_send()
195 FMSG("Verifying thread"); in ti_sci_transport_recv()
H A Dti_sci.c111 FMSG("Sending %"PRIx16" with seq %"PRIu8" host %"PRIu8, in ti_sci_do_xfer()
142 FMSG("Receive %"PRIx16" with seq %"PRIu8" host %"PRIu8, in ti_sci_do_xfer()
/optee_os/core/drivers/regulator/
H A Dstm32mp13_regulator_iod.c85 FMSG("%s: set state %u", regulator_name(regu), enable); in iod_set_state()
133 FMSG("%s: set voltage level to %duV", regulator_name(regu), level_uv); in iod_set_voltage()
198 FMSG("%s: suspend", regulator_name(regu)); in iod_pm()
210 FMSG("%s: resume", regulator_name(regu)); in iod_pm()
240 FMSG("IOD regulator %s intiialized", regulator_name(regu)); in iod_supplied_init()
274 FMSG("iod probe node '%s'", node_name); in iod_regulator_probe()
H A Dregulator.c52 FMSG("%s", regulator_name(regulator)); in regulator_refcnt_enable()
84 FMSG("%s refcount: %u", regulator_name(regulator), regulator->refcount); in regulator_refcnt_enable()
94 FMSG("%s", regulator_name(regulator)); in regulator_enable()
104 FMSG("%s", regulator_name(regulator)); in regulator_refcnt_disable()
126 FMSG("%s refcount: %u", regulator_name(regulator), regulator->refcount); in regulator_refcnt_disable()
142 FMSG("%s", regulator_name(regulator)); in regulator_disable()
192 FMSG("%s %duV", regulator_name(regulator), level_uv); in regulator_set_voltage()
224 FMSG("%s %"PRIu32"uS", regulator_name(regulator), d); in regulator_set_voltage()
H A Dregulator_dt.c172 FMSG("Regulator: finalize %s registering", regulator_name(regulator)); in register_final()
278 FMSG("Regulator: parse DT node %s", fdt_get_name(fdt, node, NULL)); in parse_dt()
321 FMSG("%s: ramp delay = %"PRIu32" (uV/us)", in parse_dt()
329 FMSG("%s: enable ramp delay = %u (us)", in parse_dt()
/optee_os/core/drivers/crypto/stm32/
H A Decc.c81 FMSG("Using PKA"); in stm32_gen_keypair()
212 FMSG("Using PKA"); in stm32_sign()
282 FMSG("Using PKA"); in stm32_verify()
302 FMSG("Using PKA"); in stm32_alloc_keypair()
356 FMSG("Using PKA"); in stm32_free_publickey()
483 FMSG("Using PKA"); in stm32_shared_secret()
H A Dhash.c171 FMSG("Using HASH %"PRIu32, stm32_algo); in stm32_hash_allocate()
H A Dcipher.c246 FMSG("Using CRYP %d", algo); in alloc_cryp_ctx()
323 FMSG("Using SAES %d", saes_algo); in stm32_saes_cipher_allocate()
H A Dhmac.c211 FMSG("Using HMAC %d", stm32_algo); in stm32_hmac_allocate()
/optee_os/core/pta/
H A Dscp03.c23 FMSG("command entry point for pseudo-TA \"%s\"", PTA_NAME); in invoke_command()
H A Dhwrng.c63 FMSG(PTA_NAME" command %#"PRIx32" ptypes %#"PRIx32, cmd, ptypes); in invoke_command()
H A Dapdu.c57 FMSG("command entry point for pseudo-TA \"%s\"", PTA_NAME); in invoke_command()
/optee_os/lib/libmbedtls/core/
H A Decc.c133 FMSG("mbedtls_ecdsa_genkey failed."); in ecc_generate_keypair()
142 FMSG("Check the size of the keys failed."); in ecc_generate_keypair()
149 FMSG("Check LMD failed."); in ecc_generate_keypair()
231 FMSG("mbedtls_ecdsa_sign failed, returned 0x%x", -lmd_res); in ecc_sign()
299 FMSG("mbedtls_ecdsa_verify failed, returned 0x%x", -lmd_res); in ecc_verify()
H A Ddh.c81 FMSG("mbedtls_dhm_make_public err, return is 0x%x", -lmd_res); in crypto_acipher_gen_dh_key()
128 FMSG("mbedtls_dhm_calc_secret failed, ret is 0x%x", -lmd_res); in crypto_acipher_dh_shared_secret()
H A Drsa.c369 FMSG("mbedtls_rsa_public() returned 0x%x", -lmd_res); in sw_crypto_acipher_rsanopad_encrypt()
430 FMSG("mbedtls_rsa_private() returned 0x%x", -lmd_res); in sw_crypto_acipher_rsanopad_decrypt()
541 FMSG("decrypt_func() returned 0x%x", -lmd_res); in sw_crypto_acipher_rsaes_decrypt()
639 FMSG("encrypt_func() returned 0x%x", -lmd_res); in sw_crypto_acipher_rsaes_encrypt()
743 FMSG("sign_func failed, returned 0x%x", -lmd_res); in sw_crypto_acipher_rsassa_sign()
861 FMSG("verify_func failed, returned 0x%x", -lmd_res); in sw_crypto_acipher_rsassa_verify()
/optee_os/core/arch/arm/kernel/
H A Dtee_time_arm_cntpct.c68 FMSG("0x%02X", (int)acc & ((1 << (bytes * 8)) - 1)); in plat_prng_add_jitter_entropy()
/optee_os/core/kernel/
H A Dwait_queue.c178 FMSG("promote thread %u %p %s:%d", in wq_promote_condvar()
181 FMSG("promote thread %u %p", in wq_promote_condvar()
H A Dembedded_ts.c178 FMSG("%zu bytes", out); in read_compressed()
/optee_os/core/arch/arm/plat-stm32mp2/drivers/
H A Dstm32mp25_syscfg.c67 FMSG("Set safe reset to %d", status); in stm32mp25_syscfg_set_safe_reset()
/optee_os/core/arch/arm/plat-stm32mp1/
H A Dscmi_server.c596 FMSG("SCMI clock %u enable", scmi_id); in plat_scmi_clock_set_state()
602 FMSG("SCMI clock %u disable", scmi_id); in plat_scmi_clock_set_state()
673 FMSG("SCMI reset %u cycle", scmi_id); in plat_scmi_rd_autonomous()
704 FMSG("SCMI reset %u set", scmi_id); in plat_scmi_rd_set_state()
707 FMSG("SCMI reset %u release", scmi_id); in plat_scmi_rd_set_state()
1057 FMSG("%zu levels: start %zu requested %zu output %zu", in plat_scmi_perf_levels_array()
/optee_os/core/drivers/scmi-msg/
H A Dperf_domain.c18 #define VERBOSE_MSG(...) FMSG(__VA_ARGS__)
198 FMSG("channel %u: domain %u", msg->channel_id, domain_id); in scmi_perf_domain_attributes()
/optee_os/core/drivers/
H A Dstm32_tamp.c1056 FMSG("Tamper event occurred at:"); in stm32_tamp_it_handler()
1057 FMSG("\n \t Date: %"PRIu32"/%"PRIu32"\n \t Time: %"PRIu32":%"PRIu32":%"PRIu32, in stm32_tamp_it_handler()
1144 FMSG("INT_TAMP%d disabled", id - INT_TAMP1 + 1); in stm32_tamp_set_int_config()
1194 FMSG("EXT_TAMP%d disabled", id - EXT_TAMP1 + 1); in stm32_tamp_set_ext_config()
1362 FMSG("Set passive conf %08"PRIx32, fltcr); in stm32_tamp_set_config()
1367 FMSG("Set active conf1 %08"PRIx32, atcr1); in stm32_tamp_set_config()
1372 FMSG("Set active conf2 %08"PRIx32, atcr2); in stm32_tamp_set_config()
2139 FMSG("STM32 TAMPER V%"PRIx32".%"PRIu32, in stm32_tamp_probe()

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