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Searched refs:DDR3PHY_ACDLLCR_DLLSRST (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/drivers/sam/
H A Dsama7-ddr.h34 #define DDR3PHY_ACDLLCR_DLLSRST BIT(30) /* DLL Soft Reset */ macro
/optee_os/core/drivers/pm/sam/
H A Dpm_suspend.S147 bic tmp1, tmp1, #DDR3PHY_ACDLLCR_DLLSRST