Searched refs:AT91_PMC_MCKR (Results 1 – 7 of 7) sorted by relevance
| /optee_os/core/drivers/ |
| H A D | atmel_shdwc_a32.S | 49 ldr r6, [r2, #AT91_PMC_MCKR] 62 ldr r6, [r2, #AT91_PMC_MCKR] 64 str r6, [r2, #AT91_PMC_MCKR]
|
| /optee_os/core/drivers/clk/sam/ |
| H A D | at91_plldiv.c | 19 unsigned int mckr = io_read32(pmc->base + AT91_PMC_MCKR); in clk_plldiv_get_rate() 35 io_clrsetbits32(pmc->base + AT91_PMC_MCKR, AT91_PMC_PLLADIV2, in clk_plldiv_set_rate()
|
| H A D | at91_h32mx.c | 21 unsigned int mckr = io_read32(pmc->base + AT91_PMC_MCKR); in clk_sama5d4_h32mx_get_rate() 45 io_clrsetbits32(pmc->base + AT91_PMC_MCKR, AT91_PMC_H32MXDIV, mckr); in clk_sama5d4_h32mx_set_rate()
|
| H A D | at91_pmc.h | 103 #define AT91_PMC_MCKR 0x28 macro 105 #define AT91_PMC_MCKR 0x30 macro
|
| H A D | at91_pmc.c | 201 pmc_cache.mckr = io_read32(pmc_base + AT91_PMC_MCKR); in pmc_suspend() 235 tmp = io_read32(pmc_base + AT91_PMC_MCKR); in pmc_resume()
|
| H A D | at91_master.c | 183 .offset = AT91_PMC_MCKR,
|
| /optee_os/core/drivers/pm/sam/ |
| H A D | pm_suspend.S | 409 ldr tmp1, [pmc, #AT91_PMC_MCKR] 411 str tmp1, [pmc, #AT91_PMC_MCKR] 461 ldr tmp1, [pmc, #AT91_PMC_MCKR] 464 str tmp1, [pmc, #AT91_PMC_MCKR] 506 ldr tmp1, [pmc, #AT91_PMC_MCKR] 508 str tmp1, [pmc, #AT91_PMC_MCKR] 585 ldr tmp1, [pmc, #AT91_PMC_MCKR] 588 str tmp1, [pmc, #AT91_PMC_MCKR] 623 ldr tmp1, [pmc, #AT91_PMC_MCKR] 625 str tmp1, [pmc, #AT91_PMC_MCKR] [all …]
|