Searched refs:vp9_hw_regs (Results 1 – 3 of 3) sorted by relevance
287 Vdpu382Vp9dRegSet *vp9_hw_regs, in vp9d_refine_rcb_size() argument338 if (vp9_hw_regs->common.reg012.fbc_e) { in vp9d_refine_rcb_size()346 if (vp9_hw_regs->common.reg012.fbc_e) { in vp9d_refine_rcb_size()467 Vdpu382Vp9dRegSet *vp9_hw_regs = (Vdpu382Vp9dRegSet*)hw_ctx->hw_regs; in hal_vp9d_vdpu382_gen_regs() local477 vp9_hw_regs->vp9d_param.reg103.prob_update_en = 1; in hal_vp9d_vdpu382_gen_regs()478 vp9_hw_regs->vp9d_param.reg103.intra_only_flag = intraFlag; in hal_vp9d_vdpu382_gen_regs()480 vp9_hw_regs->vp9d_param.reg103.txfmmode_rfsh_en = (pic_param->txmode == 4) ? 1 : 0; in hal_vp9d_vdpu382_gen_regs()481 … vp9_hw_regs->vp9d_param.reg103.interp_filter_switch_en = pic_param->interp_filter == 4 ? 1 : 0; in hal_vp9d_vdpu382_gen_regs()483 vp9_hw_regs->vp9d_param.reg103.ref_mode_rfsh_en = 1; in hal_vp9d_vdpu382_gen_regs()484 vp9_hw_regs->vp9d_param.reg103.single_ref_rfsh_en = 1; in hal_vp9d_vdpu382_gen_regs()[all …]
285 Vdpu34xVp9dRegSet *vp9_hw_regs, in vp9d_refine_rcb_size() argument328 if (vp9_hw_regs->common.reg012.fbc_e) { in vp9d_refine_rcb_size()334 if (vp9_hw_regs->common.reg012.fbc_e) { in vp9d_refine_rcb_size()454 Vdpu34xVp9dRegSet *vp9_hw_regs = (Vdpu34xVp9dRegSet*)hw_ctx->hw_regs; in hal_vp9d_vdpu34x_gen_regs() local464 vp9_hw_regs->vp9d_param.reg103.prob_update_en = 1; in hal_vp9d_vdpu34x_gen_regs()465 vp9_hw_regs->vp9d_param.reg103.intra_only_flag = intraFlag; in hal_vp9d_vdpu34x_gen_regs()467 vp9_hw_regs->vp9d_param.reg103.txfmmode_rfsh_en = (pic_param->txmode == 4) ? 1 : 0; in hal_vp9d_vdpu34x_gen_regs()468 … vp9_hw_regs->vp9d_param.reg103.interp_filter_switch_en = pic_param->interp_filter == 4 ? 1 : 0; in hal_vp9d_vdpu34x_gen_regs()470 vp9_hw_regs->vp9d_param.reg103.ref_mode_rfsh_en = 1; in hal_vp9d_vdpu34x_gen_regs()471 vp9_hw_regs->vp9d_param.reg103.single_ref_rfsh_en = 1; in hal_vp9d_vdpu34x_gen_regs()[all …]
289 VP9_REGS *vp9_hw_regs = (VP9_REGS*)hw_ctx->hw_regs; in hal_vp9d_rkv_gen_regs() local294 vp9_hw_regs->swreg2_sysctrl.sw_dec_mode = 2; //set as vp9 dec in hal_vp9d_rkv_gen_regs()295 vp9_hw_regs->swreg5_stream_len = ((stream_len + 15) & (~15)) + 0x80; in hal_vp9d_rkv_gen_regs()299 aglin_offset = vp9_hw_regs->swreg5_stream_len - stream_len; in hal_vp9d_rkv_gen_regs()317 vp9_hw_regs->swreg3_picpar.sw_y_hor_virstride = sw_y_hor_virstride; in hal_vp9d_rkv_gen_regs()318 vp9_hw_regs->swreg3_picpar.sw_uv_hor_virstride = sw_uv_hor_virstride; in hal_vp9d_rkv_gen_regs()319 vp9_hw_regs->swreg8_y_virstride.sw_y_virstride = sw_y_virstride; in hal_vp9d_rkv_gen_regs()320 vp9_hw_regs->swreg9_yuv_virstride.sw_yuv_virstride = sw_yuv_virstride; in hal_vp9d_rkv_gen_regs()330 vp9_hw_regs->swreg7_decout_base = mpp_buffer_get_fd(framebuf); in hal_vp9d_rkv_gen_regs()331 vp9_hw_regs->swreg4_strm_rlc_base = mpp_buffer_get_fd(streambuf); in hal_vp9d_rkv_gen_regs()[all …]