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Searched refs:timer_reg_base (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/kernel/arch/mips/loongson32/common/
H A Dtime.c35 static void __iomem *timer_reg_base; variable
40 __raw_writel(period, timer_reg_base + PWM_HRC); in ls1x_pwmtimer_set_period()
41 __raw_writel(period, timer_reg_base + PWM_LRC); in ls1x_pwmtimer_set_period()
46 __raw_writel(0x0, timer_reg_base + PWM_CNT); in ls1x_pwmtimer_restart()
47 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_pwmtimer_restart()
52 timer_reg_base = ioremap(LS1X_TIMER_BASE, SZ_16); in ls1x_pwmtimer_init()
53 if (!timer_reg_base) in ls1x_pwmtimer_init()
86 count = __raw_readl(timer_reg_base + PWM_CNT); in ls1x_clocksource_read()
131 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_periodic()
140 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_tick_resume()
[all …]
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Dtimer-tegra.c52 static void __iomem *timer_reg_base; variable
113 writel_relaxed(usec_config, timer_reg_base + TIMERUS_USEC_CFG); in tegra_timer_resume()
169 return readl_relaxed(timer_reg_base + TIMERUS_CNTR_1US); in tegra_read_sched_clock()
175 return readl_relaxed(timer_reg_base + TIMERUS_CNTR_1US); in tegra_delay_timer_read_counter_long()
262 timer_reg_base = timer_of_base(to); in tegra_init_timer()
299 writel_relaxed(usec_config, timer_reg_base + TIMERUS_USEC_CFG); in tegra_init_timer()
318 cpu_to->of_base.base = timer_reg_base + base; in tegra_init_timer()
337 ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, in tegra_init_timer()
366 to->of_base.base = timer_reg_base; in tegra_init_timer()