Searched refs:tim3 (Results 1 – 4 of 4) sorted by relevance
48 u32 tim3; member68 u32 tim3; member182 regs->tim3 = fb->panel->tim3; in clcdfb_decode()
493 u32 tim3 = 0, val = 0, t_dqsck; in get_sdram_tim_3_shdw() local497 tim3 |= val << T_RAS_MAX_SHIFT; in get_sdram_tim_3_shdw()500 tim3 |= val << T_RFC_SHIFT; in get_sdram_tim_3_shdw()509 tim3 |= val << T_TDQSCKMAX_SHIFT; in get_sdram_tim_3_shdw()512 tim3 |= val << ZQ_ZQCS_SHIFT; in get_sdram_tim_3_shdw()516 tim3 |= val << T_CKESR_SHIFT; in get_sdram_tim_3_shdw()519 tim3 |= (EMIF_T_CSTA - 1) << T_CSTA_SHIFT; in get_sdram_tim_3_shdw()522 tim3 |= val << T_PDLL_UL_SHIFT; in get_sdram_tim_3_shdw()525 return tim3; in get_sdram_tim_3_shdw()880 u32 tim1, tim3, ref_ctrl, type; in setup_temperature_sensitive_regs() local[all …]
658 u32 tim3 = 0, val = 0; in get_sdram_tim_3_reg() local660 tim3 |= val << EMIF_REG_T_RAS_MAX_SHIFT; in get_sdram_tim_3_reg()663 tim3 |= val << EMIF_REG_T_RFC_SHIFT; in get_sdram_tim_3_reg()666 tim3 |= val << EMIF_REG_T_TDQSCKMAX_SHIFT; in get_sdram_tim_3_reg()669 tim3 |= val << EMIF_REG_ZQ_ZQCS_SHIFT; in get_sdram_tim_3_reg()672 tim3 |= val << EMIF_REG_T_CKESR_SHIFT; in get_sdram_tim_3_reg()674 return tim3; in get_sdram_tim_3_reg()
312 writel(regs.tim3, fb->regs + CLCD_TIM3); in clcdfb_set_par()