Searched refs:sw01 (Results 1 – 8 of 8) sorted by relevance
137 p_regs->sw01.dec_irq = 0; in hal_m2vd_vdpu1_init_hwcfg()250 p_regs->sw01.dec_e = 1; in hal_m2vd_vdpu1_gen_regs()311 if (reg_out->sw01.dec_error_int | reg_out->sw01.dec_buffer_int) { in hal_m2vd_vdpu1_wait()
50 } sw01; member
798 if (p_regs->sw01.dec_error_sta in rkv_h264d_wait()799 || (!p_regs->sw01.dec_rdy_sta) in rkv_h264d_wait()800 || p_regs->sw01.dec_empty_sta in rkv_h264d_wait()810 memset(&p_regs->sw01, 0, sizeof(RK_U32)); in rkv_h264d_wait()
59 } sw01; member
52 p_regs->sw01.dec_irq_dis = 0; in set_defalut_parameters()82 p_regs->sw01.dec_irq_dis = 0; in set_regs_parameters()404 p_regs->sw01.dec_e = 1; in set_regs_parameters()643 if (!((AvsdVdpu1Regs_t *)p_hal->p_regs)->sw01.dec_rdy_int) { in hal_avsd_vdpu1_wait()
42 } sw01; member
60 p_regs->sw01.dec_irq_dis = 0; in set_defalut_parameters()495 p_regs->sw01.dec_e = 1; in set_regs_parameters()754 param.hard_err = (!((AvsdPlusRegs_t *)p_hal->p_regs)->sw01.dec_rdy_int); in hal_avsd_plus_wait()