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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c265 static void rn_dump_clk_registers(struct clk_state_registers_and_bypass *regs_and_bypass, in rn_dump_clk_registers() argument
275 regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10; in rn_dump_clk_registers()
276 regs_and_bypass->dcf_deep_sleep_divider = internal.CLK1_CLK3_DS_CNTL / 10; in rn_dump_clk_registers()
277 regs_and_bypass->dcf_deep_sleep_allow = internal.CLK1_CLK3_ALLOW_DS; in rn_dump_clk_registers()
278 regs_and_bypass->dprefclk = internal.CLK1_CLK2_CURRENT_CNT / 10; in rn_dump_clk_registers()
279 regs_and_bypass->dispclk = internal.CLK1_CLK0_CURRENT_CNT / 10; in rn_dump_clk_registers()
280 regs_and_bypass->dppclk = internal.CLK1_CLK1_CURRENT_CNT / 10; in rn_dump_clk_registers()
282 regs_and_bypass->dppclk_bypass = internal.CLK1_CLK1_BYPASS_CNTL & 0x0007; in rn_dump_clk_registers()
283 if (regs_and_bypass->dppclk_bypass < 0 || regs_and_bypass->dppclk_bypass > 4) in rn_dump_clk_registers()
284 regs_and_bypass->dppclk_bypass = 0; in rn_dump_clk_registers()
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