Searched refs:ranked (Results 1 – 5 of 5) sorted by relevance
339 const rp& ranked = m_ranked_points[i]; in find_open_generic() local340 if (ranked.direction != dir_from) in find_open_generic()345 signed_size_type const& index = ranked.seg_id.*Member; in find_open_generic()478 rp& ranked = m_ranked_points[i]; in assign_ranks() local483 ? ranked.rank >= min_rank && ranked.rank <= max_rank in assign_ranks()484 : ranked.rank >= min_rank || ranked.rank <= max_rank in assign_ranks()491 ranked.count_left++; in assign_ranks()495 ranked.count_right++; in assign_ranks()514 rp& ranked = m_ranked_points[index]; in find_polygons_for_source() local516 if (ranked.rank != previous_rank && ! in_polygon) in find_polygons_for_source()[all …]
764 const typename sbs_type::rp& ranked = sbs.m_ranked_points[i]; in gather_cluster_properties() local765 turn_type& turn = turns[ranked.turn_index]; in gather_cluster_properties()766 turn_operation_type& op = turn.operations[ranked.operation_index]; in gather_cluster_properties()773 if (ranked.direction != sort_by_side::dir_to) in gather_cluster_properties()778 op.enriched.count_left = ranked.count_left; in gather_cluster_properties()779 op.enriched.count_right = ranked.count_right; in gather_cluster_properties()780 op.enriched.rank = ranked.rank; in gather_cluster_properties()781 op.enriched.zone = ranked.zone; in gather_cluster_properties()784 && ranked.count_left != 0) in gather_cluster_properties()786 && ranked.count_right != 2)) in gather_cluster_properties()
77 A Single-ranked stick has 1 chip-select row of memory. Motherboards78 commonly drive two chip-select pins to a memory stick. A single-ranked85 A double-ranked stick has two chip-select rows which access different
383 Memory DIMMs come single or dual "ranked". A rank is a populated csrow.384 In the example above 2 dual ranked DIMMs are similarly placed. Thus,386 ranked DIMMs are placed in slots DIMM_A0 and DIMM_B0, then they will416 of a single ranked DIMMs. This should also apply in both Channels, in418 csrow3 are populated, this indicates a dual ranked set of DIMMs for
36 pair may be organized into different ranked access classes to represent